Auvidea J120-IMU rev.7 carrier board

So, I needed a small TX2 carrier board with HDMI out, at least one working USB3.0 and one nVME M2 card slot. These requirements pretty much narrow down my options to a single board - Auvidea J120. Despite reading all the comments about Auvidea support, I went ahead with ordering this board and got it this week. It’s J120-IMU rev.7 S/N 7-177. Strangely, it has handmarks indicating both IMU and MCU, but looking on the back of the board I can see some components are missing, so not sure whether it has MCU or not (not important to me, anyways). So, in the nutshell it’s the latest revision of J120 board (rev. 7) fresh from Auvidea. TX2 module I have boots up, nVME card and ethernet works, serial console on UART0 works.

Here’s the issues:

  1. FAN is always on. I think I will need to change the device tree in order to control it, not a big deal anyway.
  2. Booting default kernel after TIMEOUT specified in extlinux.conf doesn’t work. U-boot just sits there in the menu waiting for menu selection. That is rather annoying, and I need to figure out why it doesn’t respect TIMEOUT/DEFAULT menu selections.
  3. USB is a problem - lsusb returns nothing. I’ve downloaded the latest F/W from Auvidea site (ver. 1.5 released just a few days back) as well as their previous F/W release 1.4 and I’m puzzled. There’s no installation scripts or anything, and the instructions are very vague. I think to get USB working I need to modify both device tree and bootloader. However I have no clue which BTC file is used by their board. They provide all four configurations:

In fact they have two different files for config #4, so I’m not even sure which is the right one.

bash-3.2$ diff tegra186-mb1-bct-pmic-quill-p3310-1000-c04.cfg BCT/tegra186-mb1-bct-pmic-quill-p3310-1000-c04.cfg 
< pmic.generic.1.block[3].type = 1; # I2C Type
< pmic.generic.1.block[3].i2c-controller-id = 4;
< pmic.generic.1.block[3].slave-add = 0x78; # 7BIt:0x3C
< pmic.generic.1.block[3].reg-data-size = 8;
< pmic.generic.1.block[3].reg-add-size = 8;
< pmic.generic.1.block[3].block-delay = 10;
< pmic.generic.1.block[3].count = 6;
< pmic.generic.1.block[3].commands[0].0x2A.0x01 = 0x01; # SS_L3
< pmic.generic.1.block[3].commands[1].0x2E.0x01 = 0x01; # SS_L5
< pmic.generic.1.block[3].commands[2].0x34.0x01 = 0x01; # SS_L8
< pmic.generic.1.block[3].commands[3].0x33.0xFF = 0xC4;
< pmic.generic.1.block[3].commands[4].0x34.0xFE = 0xCA;
< pmic.generic.1.block[3].commands[5].0x4E.0xFF = 0x61;
> pmic.generic.1.block[2].type = 1; # I2C Type
> pmic.generic.1.block[2].i2c-controller-id = 4;
> pmic.generic.1.block[2].slave-add = 0x78; # 7BIt:0x3C
> pmic.generic.1.block[2].reg-data-size = 8;
> pmic.generic.1.block[2].reg-add-size = 8;
> pmic.generic.1.block[2].block-delay = 10;
> pmic.generic.1.block[2].count = 6;
> pmic.generic.1.block[2].commands[0].0x2A.0x01 = 0x01; # SS_L3
> pmic.generic.1.block[2].commands[1].0x2E.0x01 = 0x01; # SS_L5
> pmic.generic.1.block[2].commands[2].0x34.0x01 = 0x01; # SS_L8
> pmic.generic.1.block[2].commands[3].0x33.0xFF = 0xC4;
> pmic.generic.1.block[2].commands[4].0x34.0xFE = 0xCA;
> pmic.generic.1.block[2].commands[5].0x4E.0xFF = 0x61;

Is there any instructions/documentation on how to update just the bootloader alone? I can compile the re-flash the device tree and kernel separately, but I’m totally lost as far as bootloader modification goes. Anyway, reflashing TX2 back to stock image is not an option, we already made quite a few modifications on its rootfs and obviously don’t want to lose any of them.

Any help is greatly appreciated!


Also, forgot to mention - there’s absolutely no information can be found anywhere on what hardware changes Auvidea made on J120 Rev. 6 and Rev.7 boards. I’m attaching their device tree modifications extracted from F/W 1.5 (sorry, not a true patch file, but still should be readable) in case anyone is interested.

diff.txt (9.51 KB)

Ok, figured how to disable the annoying fan:

echo 398 > /sys/class/gpio/export
echo "out" > /sys/class/gpio/gpio398/direction
echo 1 > /sys/class/gpio/gpio398/value

to turn it back on:

echo 0 > /sys/class/gpio/gpio398/value

I think it should be a way to control its RPM’s via PWM as well as disable it at boot time via device tree modification, I’ll try to take a look at it when have more time.


Got USB working, alas only in USB2 mode by modifying device tree with Auvidea provided changes. Even when lsusb output says 5000M, the USB3 device I’ve tried to connect was negotiating the link speed @ 480M only…

root@tx2:~# lsusb -t
/:  Bus 02.Port 1: Dev 1, Class=root_hub, Driver=xhci-tegra/3p, 5000M
/:  Bus 01.Port 1: Dev 1, Class=root_hub, Driver=xhci-tegra/4p, 480M

Looks like to get USB3 working, I’ll need to modify the PMIC rail config file in the bootloader directory?


Hi albertr, have you contacted Auvidea Support with your questions?

Hi Dustin, from my experience Auvidea’s technical support is pretty much non-existent. I found more technical info about their carrier boards by browsing this forum than they ever disclosed to me during my multiple attempts to contact them via direct email and ticketing system their support is using.


Thank you albertr, we’ll alert them to the thread and your feedback regarding the version 1.5 firmware.

I saved my rootfs using the modified script from the following TX2 cloning thread (thanks Dustin!):

and then re-flashed everything using BCT files provided by Auvidea’s F/W update.
J120 recovery mode works fine, so I did everything using the J120 board.

And… it turned out that my only USB3 device - the cheap USB3 hub doesn’t negotiate super speed correctly… doh!
I’m gonna grab some USB3 memory stick from local office store tomorrow to test J120 USB3 compatibility.


Ok, I’m happy to report that USB3 works on Auvidea J120-IMU rev.7 board. I’ve grabbed a cheap USB3.0 flash memory drive from local Target store and it negotiates to superspeed when plugged into the top USB host port on the board, i.e.:

[49975.313399] usb 2-1: new SuperSpeed USB device number 3 using xhci-tegra
[49975.334489] usb 2-1: New USB device found] usb 2-1: Product: Ultra
[49975.352103] usb 2-1: Mahci_mbox_work mailbox command 6
[49975.371170] usb-storage 2-1:1.0: USB Mass Storage device detected
[49975.377437] scsi host6: usb-storage 2-1:1.0
[49976.382261] scsi 6:0:0:0: Direct-Access     SanDisk  Ultra  18] sd 6:0:0:0: [sda] Write Protect is off
[499d, doesn't support DPO or FUA
[49976.431913]  sda: sda1
[49976.436776] sd 6:0:0:0: [sda] Attached SCSI removable disk

lsusb confirms it too:

root@tx2:/backup# lsusb -t
/:  Bus 02.Port 1: Dev 1, Class=root_hub, Driver=xhci-tegra/3p, 5000M
    |__ Port 1: Dev 2, If 0, Class=Mass Storage, Driver=usb-storage, 5000M
/:  Bus 01.Port 1: Dev 1, Class=root_hub, Driver=xhci-tegra/4p, 480M

It’s not a high performance flash drive, but at least I’m seeing around 80MB/s speed when reading it which is on par with what I see on my desktop computer and definitely within USB3 territory (> 480Mb/s).

Only the top USB host port on J120 works @ USB3 superspeed, the bottom one is always negotiates down to USB2 highspeed.
OTG USB port works as expected (device mode when flashing and USB2 host mode when it detects client devices).

I’m starting to like J120 … ;-)


The u-boot issue (#2) has nothing to do with Auvidea J120 and was separated to its own discussion thread here:

I’ll try to take a look at controlling fan’s speed next…


Did anyone have any luck making CAN Bus work on J120 with TX2? I’m scratching my head to no avail. I can see SPI to CAN converter chip - 2515 on the board, but mcp251x kernel module doesn’t create any CAN interface devices…

BTW, Auvidea tech support is a joke. If anyone is thinking of buying the J120, don’t count on any help from the maker.


I took another look at my J120 board and I have noticed that it does in fact has MCU - STM32F042F6P6. Does anyone know how to configure and control it?


Making pwm-fan work on the J120 board was as easy as removing GPIO from vdd-fan regulator. There’s no tca9539 i/o expander on this board and 5VDC fan voltage regulator cannot be controlled.

--- tegra186-cvb-prod-p2597-b00-p3310-1000-a00-00.dtsi.orig	2017-07-20 03:41:08.000000000 -0400
+++ tegra186-cvb-prod-p2597-b00-p3310-1000-a00-00.dtsi	2018-01-20 19:23:00.097237587 -0500
@@ -244,15 +244,15 @@
 		vdd_fan: regulator@13 {
 			compatible = "regulator-fixed-sync";
 			reg = <13>;
 			regulator-name = "vdd-fan";
 			regulator-min-microvolt = <5000000>;
 			regulator-max-microvolt = <5000000>;
-			gpio = <&gpio_i2c_0_74 4 0>;
+//			gpio = <&tegra_main_gpio TEGRA_MAIN_GPIO(J, 6) 0>;
 		vdd_3v3: regulator@14 {
 			compatible = "regulator-fixed-sync";
 			reg = <14>;
 			regulator-name = "vdd-3v3";
 			regulator-min-microvolt = <3300000>;

Also, PWM GPIO pin needs to be changed to GPIO19_AUD_RTS:

--- tegra186-quill-pwm-fan.dtsi.orig	2017-07-20 03:41:08.000000000 -0400
+++ tegra186-quill-pwm-fan.dtsi	2018-01-20 18:30:47.905525502 -0500
@@ -20,22 +20,24 @@
 		active_steps = <10>;
 		active_rpm = <0 1000 2000 3000 4000 5000 6000 7000 10000 11000>;
 		rpm_diff_tolerance = <2>;
 		active_rru = <40 2 1 1 1 1 1 1 1 1>;
 		active_rrd = <40 2 1 1 1 1 1 1 1 1>;
 		state_cap_lookup = <2 2 2 2 3 3 3 4 4 4>;
 		pwm_period = <45334>;
 		pwm_id = <3>;
 		step_time = <100>; /* mesecs */
 		state_cap = <7>;
 		active_pwm_max = <256>;
 		tach_period = <1000>;
-		pwm_gpio = <&tegra_aon_gpio TEGRA_AON_GPIO(V, 6) GPIO_ACTIVE_LOW>; /* TEGRA_MAIN_GPIO_PV6 */
+/*		pwm_gpio = <&tegra_aon_gpio TEGRA_AON_GPIO(V, 6) GPIO_ACTIVE_LOW>;*/ /* TEGRA_MAIN_GPIO_PV6 */
+		pwm_gpio = <&tegra_main_gpio TEGRA_MAIN_GPIO(J, 6) GPIO_ACTIVE_LOW>; /* TEGRA_MAIN_GPIO_PJ6 */
 	pwm-fan {
 		status = "okay";
 		compatible = "pwm-fan";
+		vdd-fan-supply = <&vdd_fan>;
 		shared_data = <&pwm_fan_shared_data>;
 		active_pwm = <0 80 120 160 255 255 255 255 255 255>;

I’m still trying to get CAN Bus working… the board has two TJA1051TK/3 tranceivers, but there’s only one MCP2515 SPI to CAN controller on the board. I have a feeling that one of the tranceivers is connected directly to TX2 internal CAN controller. If anyone got it working on J120 board with TX2 module, please let me know.

Attached is the picture showing part of J120 populated with CAN Bus components…


Hi albertr,

I have a J120 here with a TX2 on it. The fan is off now, thanks!

Connected a ZED USB 3.0 Camera and get a nice side-by-side stereo view by using gstreamer pipe:

gst-launch-1.0 v4l2src ! 'video/x-raw, format=(string)YUYV,width=(int)4416, height=(int)1242' ! nvvidconv ! 'video/x-raw(memory:NVMM), format=(string)I420' ! omxh264enc ! 'video/x-h264, stream-format=(string)byte-stream' ! h264parse ! qtmux ! filesink location=test.mp4 -e

Got the IMU running with the code from and RTIMULib.ini settings


Now struggling to get CAN running. Decompiled the dtbs delivered with Auvidea ChangesTX2J140_Kernel_r28.1 but there is no reference to mcp drivers, only spidevs:

$ ls -l /dev/spi*
crw------- 1 root root 153, 0 Jan 24 18:38 /dev/spidev1.0
crw------- 1 root root 153, 1 Jan 24 18:38 /dev/spidev2.0
crw------- 1 root root 153, 2 Jan 24 18:38 /dev/spidev2.1
crw------- 1 root root 153, 3 Jan 24 18:38 /dev/spidev3.0
crw------- 1 root root 153, 4 Jan 24 18:38 /dev/spidev3.1

I’m a bit stuck now: How to figure out the necessary clock and interrupt GPIOs to get the mcp working?



Hi Frank,

MCP2515 clock is 16000000Hz. Auvidea’s DTS files have comments indicating that it should be on spi@3240000 which means SPI bus 3 on TX2, i.e. /dev/spidev3.0. I don’t know what would be the interrupt number to use, so I didn’t specify it in the mcp251x config structure, and it fails to init on my TX2 with the following errors:

[   13.534295] mcp251x spi3.0: mcp251x,irq-gpios missing or invalid
[   13.534298] mcp251x spi3.0: mode 0, irq 0, awake 1, clkout 1, oscillator freq 16000000
[   13.534304] mcp251x spi3.0: pinctrl pins are not configured from the driver
[   14.541913] mcp251x spi3.0: MCP251x didn't enter in conf mode after reset
[   14.541981] mcp251x spi3.0: CANSTAT 0x00 CANCTRL 0x00
[   14.541983] mcp251x spi3.0: hw probe failed
[   14.541990] mcp251x spi3.0: probe failed

Which revision of J120 board do you have? I have a feeling that Auvidea did route at least one of J120’s two CAN buses to TX2’s internal CAN controller, did you try to get it working using mttcan driver? I didn’t have much time to work on it yet, but I’m planning to get a CAN-enabled controller sometime next week so I can play with it. Will let you know if I can get it working with mttcan driver.


Also, I found that TX2 module I have runs hotter in the J120 board than it did in DevKit board. It’s not much of the problem since pwm-fan driver is thermally controlled, but I’m still concerned about power drain that goes into radiating all that heat. We are planning to use it in a battery powered application, and would like to keep power consumption to the minimum. Did you notice any temperature changes using TX2 with J120 board vs. DevKit board?


Which revision of J120 board do you have?

rev. 6

did you try to get it working using mttcan driver?

Not really, only in loopback mode, which works:

sudo modprobe mttcan
sudo ip link set can0 type can loopback on bitrate 1000000
sudo ip link set up can0
candump can0 &
cangen can0
  can0  03F   [6]  A3 ED 8F 00 69 5B
  can0  03F   [6]  A3 ED 8F 00 69 5B
  can0  16D   [5]  3E 54 4A 38 45
  can0  16D   [5]  3E 54 4A 38 45
  can0  411   [3]  40 43 6A
  can0  411   [3]  40 43 6A

I will check CAN interface during the next days.


Hi albertr,

did you try to get it working using mttcan driver?

Today, I hooked-up a scope to CAN1 connector (closer to fan connector).

sudo modprobe mttcan
sudo ip link set can0 type can bitrate 1000000
sudo ifconfig can0 up
cangen can0

And yes, I see CAN waveforms. Will attach some device for further testing soon.

Nice! Can you check to see if you can get any signal on the other CAN Bus (CAN2 connector) by using mttcan driver?
I’m wondering if Auvidea did multiplex controller lines to its tranceiver to both MCP and TX2 internal controller or it’s MCP only…


Nope, CAN stays quiet. I will try to find a MCP251x on SPI busses.
But, as I need only one CAN, this is not on my prio list for now.