CAM2_MCLK (E7) and other signals for a third camera?

In the TX1 developer board schematics there are several nets (Reset, MCLK, PWDN) for a “CAM2” (third camera) interface. The Reset and PWDN nets are simply from a GPIO expander, but CAM2_MCLK comes from Pin E7 on the SoM. However, the Datasheet for the TX1 SoM states that E7 is reserved. Also, it doesn’t seem to be in the pin mux file. Can one use E7 for a third camera clock? Is there driver support for this? Also, how sensitive is the driver to us mixing/matching camera I2C busses, clocks, etc? If one were, for example, going to use the same MCLK for multiple sensors, can one easily modify the driver to accommodate this?

For pin E7, it is not connected to TX1 chip, you can refer to this post : https://devtalk.nvidia.com/default/topic/936727/about-csi-camera-master-clock/?offset=10