CanBus on the Nano

Hi,

I tried MCP2515 SPI-CAN communication on Jetson-Nano recently:
Here are the steps you can follow:

  1. Choose a GPIO pin on J41 (40 pin header) and enable interrupts on that pin.

  2. Make proper connections from MCP2515 to SPI controller on J41. There are 2 SPI controller present on J41. I have connected two MCP chips on respective SPI controller with INT pin connected to chosen GPIO.

  3. Make changes in Nano DTB:
    can_clock: can_clock {
    compatible = “fixed-clock”;
    #clock-cells = <0>;
    clock-frequency = <20000000>;
    clock-accuracy = <100>;
    };
    spi@7000d400 { /* SPI 1 to 40 pin header */
    status = “okay”;
    spi@0 {
    compatible = “microchip,mcp2515”;
    reg = <0x0>;
    spi-max-frequency = <10000000>;
    nvidia,enable-hw-based-cs;
    nvidia,rx-clk-tap-delay = <0x7>;
    clocks = <&can_clock>;
    interrupts = <&gpio TEGRA_GPIO(Z, 0) 0x1>; // GPIO pin chosen from 40 pin header
    controller-data {
    nvidia,cs-setup-clk-count = <0x1e>;
    nvidia,cs-hold-clk-count = <0x1e>;
    nvidia,rx-clk-tap-delay = <0x1f>;
    nvidia,tx-clk-tap-delay = <0x0>;
    };

              };
      };
    
      spi@7000d600 { /* SPI 2 to 40 pin header */
              status = "okay";
              spi@0 {
                      compatible = "microchip,mcp2515";
                      reg = <0x0>;
                      spi-max-frequency = <10000000>;
                      nvidia,enable-hw-based-cs;
                      nvidia,rx-clk-tap-delay = <0x6>;
                      clocks = <&can_clock>;
                      interrupts = <&gpio TEGRA_GPIO(V, 0) 0x1>;
                      controller-data {
                              nvidia,cs-setup-clk-count = <0x1e>;
                              nvidia,cs-hold-clk-count = <0x1e>;
                              nvidia,rx-clk-tap-delay = <0x1f>;
                              nvidia,tx-clk-tap-delay = <0x0>;
                      };
              };
    
  4. Make changes in Nano pinmux and GPIO dtb:
    Enable SPI0 and SPI1 with SPI functionality by configuring pins(tristate disable, input enable, change function property…)
    Add GPIO entry in gpio-input section.

Flash with the change in DTB.

Now on device after boot, run following commands:
ip link set can0 type can bitrate 500000
ip link set can0 up
ip link set can1 type can bitrate 500000
ip link set can1 up
candump -x any
cansend can0 123#abcdabcd

Thanks,
Shubhi Garg