Mcp2515 on jetson nano

[autolabor]

Hi,

1. I have connect mcp2515 module to jetson nano 4gb board, like this:

  miso <-> pin21
  mosi <-> pin19
  sclk <-> pin23
  cs   <-> pin24
  int  <-> pin31
  vcc  <-> 5v0

2. Then setting device tree of mcp251x by jetson-io.py

3. I got some log form dmesg | grep mcp,return like this:

[    4.551542] mcp251x: loading out-of-tree module taints kernel.
[    4.551900] mcp251x: loading out-of-tree module taints kernel.
[    4.566984] mcp251x spi0.0 can0: MCP2515 successfully initialized.

4. I try to use some command to send can bus message , like this:

sudo ifconfig can0 down
sudo ip link set can0 type can bitrate 250000  
sudo ifconfig can0 up
cansend can0 123#DEADBEEF

But I can not received any message on another CAN-USB device which sent from jetson nano through mcp2515.

With the help of oscilloscope, I could saw spi signal on miso、mosi、sck、cs. I could not saw any voltage changed on TXCAN and RXCAN or CAN_H and CAN_L.

The CAN transceiver is TJA1050 , it is ok on other places.

5. The result of ip -d -s link show can0, like this:

4: can0: <NOARP,ECHO> mtu 16 qdisc pfifo_fast state DOWN mode DEFAULT group default qlen 10
    link/can  promiscuity 0 
    can state STOPPED restart-ms 0 
          bitrate 250000 sample-point 0.850 
          tq 200 prop-seg 8 phase-seg1 8 phase-seg2 3 sjw 1
          mcp251x: tseg1 3..16 tseg2 2..8 sjw 1..4 brp 1..64 brp-inc 1
          clock 10000000
          re-started bus-errors arbit-lost error-warn error-pass bus-off
          0          0          0          0          0          0         numtxqueues 1 numrxqueues 1 gso_max_size 65536 gso_max_segs 65535 
    RX: bytes  packets  errors  dropped overrun mcast   
    0          0        0       0       0       0       
    TX: bytes  packets  errors  dropped carrier collsns 
    0          0        157     157     0       0       

What could be the problem？or, Is there a recommended debug method?

Thanks.
BR

[kayccc]

Please refer to Jetson nano and mcp2515 can module - Jetson & Embedded Systems / Jetson Nano - NVIDIA Developer Forums to see if can help.

[autolabor]

Hi, kayccc,

Thanks for yuour reply.

This just leads to the problem I encountered before.
I compiled the jetson-mcp251x.dtbo file according to this method and copied it to the /boot directory,.
Then deleted /boot/tegra210-p3448-0000-p3449-0000-a01-mcp251x.dtbo and /boot/tegra210-p3448-0000-p3449-0000-a02-mcp251x.dtbo
But the MCP251x CAN Controllerdtbo file cannot be displayed when running jetson-io.py.
My software version is Jetpack 4.6.1 , hardware is jetson nano b01 4GB .

Here are some terminal logs:

# ll /boot/tegra210-p3448-0000-p3449-0000-a0*-mcp251x.dtbo*
-rw-r--r-- 1 root root 3.3K 2月  20 01:05 tegra210-p3448-0000-p3449-0000-a01-mcp251x.dtbo.bak
-rw-r--r-- 1 root root 3.4K 2月  20 01:05 tegra210-p3448-0000-p3449-0000-a02-mcp251x.dtbo.bak

# ll /boot/jetson*  
-rw-r--r-- 1 root root 3.2K 3月  28 10:44 jetson-mcp251x.dtbo

# sudo /opt/nvidia/jetson-io/config-by-hardware.py -l
<Jetson.board.Board object at 0x7f876ad278>
Header 1 [default]: Jetson 40pin Header
  Available hardware modules:
  1. Adafruit SPH0645LM4H
  2. Adafruit UDA1334A
  3. FE-PI Audio V1 and Z V2
  4. ReSpeaker 4 Mic Array
  5. ReSpeaker 4 Mic Linear Array
Header 2: Jetson Nano CSI Connector
  Available hardware modules:
  1. Camera IMX219 Dual
  2. Camera IMX477 Dual
  3. Camera IMX477-A and IMX219-B
Header 3: Jetson M.2 Key E Slot
  No hardware configurations found!

Thanks.
BR.

[autolabor]

I solved the problem of not displaying “MCP251X CAN Controller” by /opt/nvidia/jetson-io/config-by-hardware.py -l command.

The file “jetson-mcp251x.dts” form the topic (Jetson nano and mcp2515 can module - #289 by michael.sanne) need to add jetson-header-name = "Jetson 40pin Header";
like this :

        ......
        overlay-name = "MCP251x CAN Controller";
        jetson-header-name = "Jetson 40pin Header";     # Add this line to jetson-mcp251x.dts 
        compatible = "nvidia,p3449-0000-b00+p3448-0000-b00\0nvidia,p3449-0000-a02+p3448-0000-a02";
        ......

[autolabor]

I think Jetpack has upgraded , some code in the jetson-mcp251x.dts file from topic Jetson nano and mcp2515 can module - #289 by michael.sanne may no longer be available

I have fixed some error from the jetson-mcp251x.dts

......
overlay-name = "MCP251x CAN Controller";
jetson-header-name = "Jetson 40pin Header";     # Add this line to jetson-mcp251x.dts 
compatible = "nvidia,p3449-0000-b00+p3448-0000-b00\0nvidia,p3449-0000-a02+p3448-0000-a02";
......

# original : pinctrl-0 = <&hdr40_pinmux>; 
pinctrl-0 = <&jetson_io_pinmux>;

# original : hdr40_pinmux: header-40pin-pinmux {
jetson_io_pinmux: exp-header-pinmux {

# original : pin19 {
hdr40-pin19 {

# others :
# original : pinxx {
hdr40-pinxx {

Here is my jetson-mcp251x.dts file. It can work well.

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Jetson Device-tree overlay for
 *   MCP2515
 *
 * Copyright (c) 2020 Seeed Technology Co,Ltd - https://www.seeed.cc.
 * All rights reserved.
 *
 */

/dts-v1/;
/plugin/;

#include <dt-bindings/pinctrl/pinctrl-tegra.h>
#include <dt-bindings/gpio/tegra-gpio.h>

/ {
	overlay-name = "MCP251x CAN Controller";
	jetson-header-name = "Jetson 40pin Header";
	compatible = "nvidia,p3449-0000-b00+p3448-0000-b00\0nvidia,p3449-0000-a02+p3448-0000-a02";

    

   	fragment@0 {
		target-path = "/";
		__overlay__ {
			clocks {
				can_clock: can_clock {
					compatible = "fixed-clock";
					#clock-cells = <0>;
					clock-frequency = <16000000>;
					clock-accuracy = <100>;
				};
			};
		};
	};

	fragment@1 {
		target = <&spi0>;
		__overlay__ {
			#address-cells = <1>;
			#size-cells = <0>;
			spi@0 {
				status = "okay";
				compatible = "microchip,mcp2515";
				reg = <0x0>;
				spi-max-frequency = <10000000>;
				nvidia,enable-hw-based-cs;
				nvidia,rx-clk-tap-delay = <0x7>;
				clocks = <&can_clock>;
				interrupt-parent = <&gpio>;
				interrupts = <TEGRA_GPIO(Z, 0) 0x1>;
				controller-data {
					nvidia,cs-setup-clk-count = <0x1e>;
					nvidia,cs-hold-clk-count = <0x1e>;
					nvidia,rx-clk-tap-delay = <0x1f>;
					nvidia,tx-clk-tap-delay = <0x0>;
				};
			};
			spi@1 {
				status = "disabled";
			};
		};
	};

	fragment@2 {
		target = <&spi1>;
		__overlay__ {
			#address-cells = <1>;
			#size-cells = <0>;
			spi@0 {
				status = "disabled";
			};			
			spi@1 {
				status = "okay";
				compatible = "microchip,mcp2515";
				reg = <0x0>;
				spi-max-frequency = <10000000>;
				nvidia,enable-hw-based-cs;
				nvidia,rx-clk-tap-delay = <0x7>;
				clocks = <&can_clock>;
				interrupt-parent = <&gpio>;
				interrupts = <TEGRA_GPIO(V, 0) 0x1>;
				controller-data {
					nvidia,cs-setup-clk-count = <0x1e>;
					nvidia,cs-hold-clk-count = <0x1e>;
					nvidia,rx-clk-tap-delay = <0x1f>;
					nvidia,tx-clk-tap-delay = <0x0>;
				};
			};
		};
	};

	fragment@3 {
		target = <&pinmux>;
		__overlay__ {
			pinctrl-names = "default";
			pinctrl-0 = <&jetson_io_pinmux>;

			jetson_io_pinmux: exp-header-pinmux {
				hdr40-pin19 {
					nvidia,pins = "spi1_mosi_pc0";
					nvidia,function = "spi1";
					nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
					nvidia,tristate = <TEGRA_PIN_DISABLE>;
					nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				};
				hdr40-pin21 {
					nvidia,pins = "spi1_miso_pc1";
					nvidia,function = "spi1";
					nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
					nvidia,tristate = <TEGRA_PIN_DISABLE>;
					nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				};
				hdr40-pin23 {
					nvidia,pins = "spi1_sck_pc2";
					nvidia,function = "spi1";
					nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
					nvidia,tristate = <TEGRA_PIN_DISABLE>;
					nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				};
				hdr40-pin24 {
					nvidia,pins = "spi1_cs0_pc3";
					nvidia,function = "spi1";
					nvidia,pull = <TEGRA_PIN_PULL_UP>;
					nvidia,tristate = <TEGRA_PIN_DISABLE>;
					nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				};
				hdr40-pin37 {
					nvidia,pins = "spi2_mosi_pb4";
					nvidia,function = "spi2";
					nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
					nvidia,tristate = <TEGRA_PIN_DISABLE>;
					nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				};
				hdr40-pin22 {
					nvidia,pins = "spi2_miso_pb5";
					nvidia,function = "spi2";
					nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
					nvidia,tristate = <TEGRA_PIN_DISABLE>;
					nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				};
				hdr40-pin13 {
					nvidia,pins = "spi2_sck_pb6";
					nvidia,function = "spi2";
					nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
					nvidia,tristate = <TEGRA_PIN_DISABLE>;
					nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				};
				hdr40-pin18 {
					nvidia,pins = "spi2_cs0_pb7";
					nvidia,function = "spi2";
					nvidia,pull = <TEGRA_PIN_PULL_UP>;
					nvidia,tristate = <TEGRA_PIN_DISABLE>;
					nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				};
			};
		};
	};
};

[autolabor]

Hi, kayccc

I have use usb_vbus_en0_pcc4 as interrupt pin of mcp2515 , here is part of my dts.

fragment@1 {
		target = <&spi0>;
		__overlay__ {
			#address-cells = <1>;
			#size-cells = <0>;
			spi@0 {
				status = "okay";
				compatible = "microchip,mcp2515";
				reg = <0x0>;
				spi-max-frequency = <10000000>;
				nvidia,enable-hw-based-cs;
				nvidia,rx-clk-tap-delay = <0x7>;
				clocks = <&can_clock>;
				interrupt-parent = <&gpio>;
				interrupts = <TEGRA_GPIO(CC, 4) 0x1>;
				controller-data {
					nvidia,cs-setup-clk-count = <0x1e>;
					nvidia,cs-hold-clk-count = <0x1e>;
					nvidia,rx-clk-tap-delay = <0x1f>;
					nvidia,tx-clk-tap-delay = <0x0>;
				};
			};
			spi@1 {
				status = "disabled";
			};
		};
	};

The result of dmesg on system booting:

# sudo dmesg  | grep mcp
[    4.758626] mcp251x: loading out-of-tree module taints kernel.
[    5.777759] mcp251x spi0.0: MCP251x didn't enter in conf mode after reset
[    5.799715] mcp251x spi0.0: Probe failed, err=16
[    5.806688] mcp251x: probe of spi0.0 failed with error -16

I think maybe the interrupt config is error. How should I write the source about usb_vbus_en0_pcc4 as interrupt pin of mcp2515？

Thanks.
BR

[WayneWWW]

Check if this helps.

Unofficial Guide to using the MCP2515 can module on the Jetson Nano 2GB

The MCP2515 CAN module is currently not officially supported on the Jetson Nano 2GB and does not work out of the box using the current Jetpack 46. This might change in the future. I have only tested this with this 16MHz can module by JOY-IT. For 8MHz can modules you have to change the can clock in the .dts file. 1. Wiring Wire the two can modules to the 40pin header according to this table. Name CAN module 1 CAN module 2 INT 31 32 SCK 23 13 SI 19 37 SO 22 21 CS 24 18 GND GND …