I’ve been trying to use AGX Xavier for development testing recently, and I’ve had two problems.
The development guide does not describe in detail how to replace the clock source.The documents for example were not even found.
One is that I can’t precisely set the CAN communication bit rate to 250000, 500000, 1000000. For example, the bit rate is set to 2500000, but the actual value is 249350. I tried to use PLLAON as clock source according to the development guide, but that really makes it difficult for me to understand the description of the operation flow. Because I can’t find all the dtb files that need to be changed and the h files for reference.
Another problem is that I set other bit rates to enable AGX Xavier to communicate with external MCU for CAN. However, I only monitored the data frame of MCU on the CAN bus, and there was no data exchange between the two devices. Check the status of CAN devices in real time and find that the CAN devices of AGX Xavier are in ERROR-POSIVE or BUS-OFF.
Hi Seanwu,
You can find dtbs in the Linux_for_Tegra/ folder when you have unpacked our Jetpack.
Header file is just for reference. To set pllaon clock, you can directly use 94 value instead of going and checking from header file. So, there are only dtbs updates to set pllaon.
For future, we have enhanced this topic in our documentation which will show up in our next release. By that time, if you have still any problems setting up pllaon clock, let us know.
Hi Shubhi，
Thank you for your reply!
According to your answer, I didn’t understand the part about Jetpack. Does that mean I have to download an attachment separately?
On the one hand, I am well aware of the need to modify the clock source. The problem I encountered was that I didn’t find all the files in the file system that needed to be modified. That means I can’t set the clock source successfully.
On the other hand, I abandon the existing scheme and use other bitrates to communicate, and here is no communication problem between can0 and can1 of AGX.
I can accept the necessity that individual bit rates cannot be set. After batch application on the project, it is really troublesome for each jetson to modify the settings.
So the key question is that it is impossible to communicate successfully with external devices at all, and the CAN BUS keeps reporting errors.
Look forward to your reply,
SeanWu
Hi SeanWu,
We are enhancing this document more and you can check updated document in our next release.
Do you still not able to find Linux_for_Tegra/ folder ?
How have you flashed the device? When you unpack Rel32 version BSP, you will see this folder. Let me know if you still are facing issues.
Hi,Shgarg,
I’m sorry that I have downloaded pack, but I don’t know how to flash the device. The guide document showed that I needed to execute the flash script, but I couldn’t find it.
Would you like to give me some help?
