Configuring pull-up on GPIO in device tree

Autonomous Machines Jetson & Embedded Systems Jetson Xavier NX
,
1

I am using a Jetson Xavier NX with a custom carrier board that uses an SD card connected to sdmmc3 with pin CC0 (spi2_sck_pcc0) connected to the card detect switch on the micro SD card cage. The board pulls the card detect line to down to ground when a card is inserted, so I want to configure the card detect pin with a pull-up. I am using a custom linux distro built with yocto using the tegra demo distro as a base. So far I have tried adding the following entry to tegra194-p3668-common.dtsi:

pinmux@2430000 {
        spi2_sck_pcc0 {
                nvidia,pins = "spi2_sck_pcc0";
                nvidia,function = "rsvd2";
                nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
                nvidia,tristate = <TEGRA_PIN_ENABLE>;
                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
                nvidia,lpdr = <TEGRA_PIN_DISABLE>;
        };
};

This does not seem to do anything because running the following command gives the same output as it did before I modified the device tree:

$ cat /sys/kernel/debug/tegra_pinctrl_reg | grep pcc0
Bank: 1 Reg: 0x0c302048 Val: 0x00000052 -> spi2_sck_pcc0

Can anybody point me in the right direction as to how to enable the pull-up on this pin?

The full patch for my changes to the device tree is as follows:

--- a/nvidia/platform/t19x/jakku/kernel-dts/common/tegra194-p3668-common.dtsi
+++ b/nvidia/platform/t19x/jakku/kernel-dts/common/tegra194-p3668-common.dtsi
@@ -291,6 +291,28 @@
                status = "okay";
        };
 
+       sdmmc3: sdhci@3440000 {
+               mmc-ocr-mask = <0x0>;
+               cd-inverted;
+               cd-gpios = <&tegra_aon_gpio TEGRA194_AON_GPIO(CC, 0) 0>;
+               nvidia,cd-wakeup-capable;
+               mmc-ocr-mask = <0>;
+               cd-inverted;
+               status = "okay";
+       };
+
+       pinmux@2430000 {
+               spi2_sck_pcc0 {
+                       nvidia,pins = "spi2_sck_pcc0";
+                       nvidia,function = "rsvd2";
+                       nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                       nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                       nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
+                       nvidia,lpdr = <TEGRA_PIN_DISABLE>;
+               };
+       };
+
        mipical@3990000 {
                status = "okay";
        };
@@ -320,20 +342,7 @@
                        label = "pex_refclk_sel_high";
                        status = "disabled";
                };
-               w-disable1 {
-                       gpio-hog;
-                       output-high;
-                       gpios = <TEGRA194_AON_GPIO(CC, 2) GPIO_ACTIVE_LOW>;
-                       label = "w-disable1";
-                       status = "okay";
-               };
-               w-disable2 {
-                       gpio-hog;
-                       output-high;
-                       gpios = <TEGRA194_AON_GPIO(CC, 0) GPIO_ACTIVE_LOW>;
-                       label = "w-disable2";
-                       status = "okay";
-               };
+
                suspend_gpio: suspend-led-gpio {
                        gpio-hog;
                        output-high;
-- 
2.17.1
3

hello cameron.mcquinn,

may I know how you update the board? that’s incorrect ways to update pinmux.
this pin, GPIO03/ SPI2_SCK/ GPIO3_PCC.00 is default configured as output direction. and… these GPIOs, i.e. (CC,2)/(CC,0) are programmed particular for M.2 wifi /BT Module to enable wifi/BT radio.

please check developer guide, Pinmux Changes to change the pinmux configuration applied by the software.

4

I got it working. For anyone who find this post in the future, this is how I got it working. I used the pinmux spreadsheet to configure the pull-up on the pin, and then generated the .dtsi file and copied the configuration for that pin into tegra194-p3668-common.dtsi. I also changed the pin name in pinctrl-tegra194.c to reflect the fact that I am using the pin for card detection.

This is my final patch:

---
 nvidia/drivers/pinctrl/pinctrl-tegra194.c     |  6 +--
 .../common/tegra194-p3668-common.dtsi         | 40 ++++++++++++-------
 2 files changed, 29 insertions(+), 17 deletions(-)

diff --git a/nvidia/drivers/pinctrl/pinctrl-tegra194.c b/nvidia/drivers/pinctrl/pinctrl-tegra194.c
index ed3323ca25ee..3c00a13ad7d3 100644
--- a/nvidia/drivers/pinctrl/pinctrl-tegra194.c
+++ b/nvidia/drivers/pinctrl/pinctrl-tegra194.c
@@ -203,7 +203,7 @@
 	fname(CAN1_EN_PBB1, can1_en_pbb1, _GPIO, 217)		\
 	fname(CAN1_WAKE_PBB2, can1_wake_pbb2, _GPIO, 218)	\
 	fname(CAN1_ERR_PBB3, can1_err_pbb3, _GPIO, 219)		\
-	fname(SPI2_SCK_PCC0, spi2_sck_pcc0, _GPIO, 224)		\
+	fname(SDMMC3_CD_PCC0, sdmmc3_cd_pcc0, _GPIO, 224)		\
 	fname(SPI2_MISO_PCC1, spi2_miso_pcc1, _GPIO, 225)	\
 	fname(SPI2_MOSI_PCC2, spi2_mosi_pcc2, _GPIO, 226)	\
 	fname(SPI2_CS0_PCC3, spi2_cs0_pcc3, _GPIO, 227)		\
@@ -461,7 +461,7 @@ static struct tegra_function tegra194_functions[] = {
 #define drive_gen2_i2c_scl_pcc7         DRV_PINGROUP_ENTRY_Y(0x2034,	12,	5,	20,	5,	-1,	-1,	-1,	-1,	1)
 #define drive_spi2_cs0_pcc3             DRV_PINGROUP_ENTRY_Y(0x203c,	12,	5,	20,	5,	-1,	-1,	-1,	-1,	1)
 #define drive_gen2_i2c_sda_pdd0         DRV_PINGROUP_ENTRY_Y(0x2044,	12,	5,	20,	5,	-1,	-1,	-1,	-1,	1)
-#define drive_spi2_sck_pcc0             DRV_PINGROUP_ENTRY_Y(0x204c,	12,	5,	20,	5,	-1,	-1,	-1,	-1,	1)
+#define drive_sdmmc3_cd_pcc0            DRV_PINGROUP_ENTRY_Y(0x204c,	12,	5,	20,	5,	-1,	-1,	-1,	-1,	1)
 #define drive_spi2_miso_pcc1            DRV_PINGROUP_ENTRY_Y(0x2054,	12,	5,	20,	5,	-1,	-1,	-1,	-1,	1)
 #define drive_can1_dout_paa0            DRV_PINGROUP_ENTRY_Y(0x3004,	28,	2,	30,	2,	-1,	-1,	-1,	-1,	1)
 #define drive_can1_din_paa1             DRV_PINGROUP_ENTRY_Y(0x300c,	28,	2,	30,	2,	-1,	-1,	-1,	-1,	1)
@@ -705,7 +705,7 @@ static const struct tegra_pingroup tegra194_groups[] = {
 	PINGROUP(gen2_i2c_scl_pcc7,	I2C2,		RSVD1,		RSVD2,		RSVD3,		0x2030,		1,	Y,	5,	-1,	6,	8,	-1,	10,	11,	12,	N,	-1,	-1,	N,	"vddio_ao"),
 	PINGROUP(spi2_cs0_pcc3,		SPI2,		UARTG,		RSVD2,		RSVD3,		0x2038,		1,	Y,	5,	-1,	6,	8,	-1,	10,	11,	12,	N,	-1,	-1,	N,	"vddio_ao"),
 	PINGROUP(gen2_i2c_sda_pdd0,	I2C2,		RSVD1,		RSVD2,		RSVD3,		0x2040,		1,	Y,	5,	-1,	6,	8,	-1,	10,	11,	12,	N,	-1,	-1,	N,	"vddio_ao"),
-	PINGROUP(spi2_sck_pcc0,		SPI2,		UARTG,		RSVD2,		RSVD3,		0x2048,		1,	Y,	5,	-1,	6,	8,	-1,	10,	11,	12,	N,	-1,	-1,	N,	"vddio_ao"),
+	PINGROUP(sdmmc3_cd_pcc0,	SDMMC3,		RSVD1,		RSVD2,		RSVD3,		0x2048,		1,	Y,	5,	-1,	6,	8,	-1,	10,	11,	12,	N,	-1,	-1,	N,	"vddio_ao"),
 	PINGROUP(spi2_miso_pcc1,	SPI2,		UARTG,		RSVD2,		RSVD3,		0x2050,		1,	Y,	5,	-1,	6,	8,	-1,	10,	11,	12,	N,	-1,	-1,	N,	"vddio_ao"),
 	PINGROUP(can1_dout_paa0,	CAN1,		RSVD1,		RSVD2,		RSVD3,		0x3000,		1,	Y,	-1,	-1,	6,	-1,	9,	10,	-1,	12,	Y,	-1,	-1,	Y,	"vddio_ao_hv"),
 	PINGROUP(can1_din_paa1,		CAN1,		RSVD1,		RSVD2,		RSVD3,		0x3008,		1,	Y,	-1,	-1,	6,	-1,	9,	10,	-1,	12,	Y,	-1,	-1,	Y,	"vddio_ao_hv"),
diff --git a/nvidia/platform/t19x/jakku/kernel-dts/common/tegra194-p3668-common.dtsi b/nvidia/platform/t19x/jakku/kernel-dts/common/tegra194-p3668-common.dtsi
index 1d98528ad41d..40b02c642a76 100644
--- a/nvidia/platform/t19x/jakku/kernel-dts/common/tegra194-p3668-common.dtsi
+++ b/nvidia/platform/t19x/jakku/kernel-dts/common/tegra194-p3668-common.dtsi
@@ -16,6 +16,7 @@
 #include "dt-bindings/extcon-ids.h"
 #include "dt-bindings/gpio/tegra194-gpio.h"
 #include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <tegra194-soc/tegra194-soc-cvm.dtsi>
 #include "tegra194-fixed-regulator-p3668.dtsi"
 #include <t19x-common-platforms/tegra194-comms.dtsi>
@@ -291,6 +292,13 @@
 		status = "okay";
 	};
 
+	sdmmc3: sdhci@3440000 {
+		mmc-ocr-mask = <0x0>;
+		cd-inverted;
+		cd-gpios = <&tegra_aon_gpio TEGRA194_AON_GPIO(CC, 0) 0>;
+		status = "okay";
+	};
+
 	mipical@3990000 {
 		status = "okay";
 	};
@@ -304,6 +312,23 @@
 		nvidia,cmd-timeout = <2000>;
 	};
 
+	pinmux@2430000 {
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinmux_default>;
+
+		pinmux_default: common {
+			sdmmc3_cd_pcc0 {
+				nvidia,pins = "sdmmc3_cd_pcc0";
+				nvidia,function = "sdmmc3";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
+				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
+			};
+		};
+	};
+
 	gpio@c2f0000 {
 		pex-refclk-sel-low {
 			gpio-hog;
@@ -320,20 +345,7 @@
 			label = "pex_refclk_sel_high";
 			status = "disabled";
 		};
-		w-disable1 {
-			gpio-hog;
-			output-high;
-			gpios = <TEGRA194_AON_GPIO(CC, 2) GPIO_ACTIVE_LOW>;
-			label = "w-disable1";
-			status = "okay";
-		};
-		w-disable2 {
-			gpio-hog;
-			output-high;
-			gpios = <TEGRA194_AON_GPIO(CC, 0) GPIO_ACTIVE_LOW>;
-			label = "w-disable2";
-			status = "okay";
-		};
+
 		suspend_gpio: suspend-led-gpio {
 			gpio-hog;
 			output-high;
--
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