TX2 J21 config pinmux as gpio in jetpack4.2

wm18822827507 · June 4, 2020, 9:57am

background: TX2 jetpack 4.2 32.1release
question: I need PIN38 of J21 as a gpio to control monitor. When I set it to low, it returns to high after a short time. what that heppend?
No pinmux configure instructions are provided in L4T32.1.

gpiochip0: GPIOs 320-511, parent: platform/2200000.gpio, tegra-gpio:
 gpio-381 (                    |reset_gpio          ) out hi    
 gpio-394 (                    |sysfs               ) out hi    
 gpio-412 (                    |vdd-usb0-5v         ) out lo    
 gpio-413 (                    |vdd-usb1-5v         ) out lo    
 gpio-420 (                    |eqos_phy_reset      ) out hi    
 gpio-424 (                    |wlan_pwr            ) out lo    
 gpio-426 (                    |camera-control-outpu) out lo    
 gpio-441 (                    |hdmi2.0_hpd         ) in  lo    
 gpio-444 (                    |wp                  ) in  hi    
 gpio-445 (                    |cd                  ) in  hi    
 gpio-446 (                    |en-vdd-sd           ) out lo    
 gpio-456 (                    |camera-control-outpu) out lo    
 gpio-457 (                    |camera-control-outpu) out lo    
 gpio-461 (                    |camera-control-outpu) out lo    
 gpio-479 (                    |external-connection:) in  hi    
 gpio-484 (                    |bt_ext_wake         ) out hi

JerryChang · June 5, 2020, 2:41am

hello wm18822827507,

you may download pinmux spreadsheets to have customization, it’ll generate several dtsi files for board configuration. you might also refer to Jetson TX2 Pinmux and GPIO Configuration and Nano’s application note for reference.
please also check [url]https://github.com/NVIDIA/jetson-gpio[/url] for a Python library that enables the use of Jetson’s GPIOs. thanks

wm18822827507 · June 5, 2020, 3:13am

Thank you very much.

wm18822827507 · June 5, 2020, 3:39am

Is the steps of TX2 the same as nano?There are too many steps involved, many of which should be particularly configured for the Nano,Can the upgraded Jetpack version be configured more easily?

JerryChang · June 5, 2020, 6:03am

hello wm18822827507,

you may using WindowsOS to generate dtsi files from the pinmux spreadsheet, copy those dtsi files to your UbuntuOS.
there’s python script, pinmux-dts2cfg.py to convert them as board configuration files. then you should perform full flash to update the board configurations.
for example,
$ python pinmux-dts2cfg.py [--pinmux] <ADDRESS_FILE> <GPIO_ADDRESS_FILE> <POR_VAL_FILE> <MANDATORY_PINMUX_FILE> <PINMUX_DTS_FILE> <GPIO_DTS_FILE> <VERSION> [--help]

you may also check some similar discussion threads, such as Topic 53026, or Topic 59977 for reference.
thanks

wm18822827507 · June 5, 2020, 6:07am

Thank you, I’ll have a try now, I will report the result as quikly as i can.

wm18822827507 · June 5, 2020, 6:45am

Some error is report, Is there a problem this time, please?
python pinmux-dts2cfg.py
–pinmux
addr_info.txt gpio_addr_info.txt por_val.txt
–mandatory_pinmux_file mandatory_pinmux.txt
tegra186-quill-p3310-1000-a00-pinmux.dtsi
tegra186-quill-p3310-1000-a00-gpio-default.dtsi
1.0
> tegra186-quill-p3310-1000-a00-pinmux-gpio.cfg

ERROR: pin dap2_sclk_pc1(0x00000440) field nvidia,enable-input(0x00000040) is not matching, val = 0x01 expected = 0x00
ERROR: pin dap2_fs_pc4(0x00000440) field nvidia,enable-input(0x00000040) is not matching, val = 0x01 expected = 0x00
ERROR: pin dmic1_clk_pm1(0x00004441) field nvidia,enable-input(0x00000040) is not matching, val = 0x01 expected = 0x00
ERROR: pin dmic2_dat_pm2(0x00004441) field nvidia,enable-input(0x00000040) is not matching, val = 0x01 expected = 0x00
ERROR: pin dap4_sclk_pcc0(0x00004440) field nvidia,enable-input(0x00000040) is not matching, val = 0x01 expected = 0x00
ERROR: pin dap4_fs_pcc3(0x00004440) field nvidia,enable-input(0x00000040) is not matching, val = 0x01 expected = 0x00
ERROR: pin sdmmc4_dqs(0x00000444) field nvidia,tristate(0x00000010) is not matching, val = 0x00 expected = 0x01

wm18822827507 · June 5, 2020, 7:01am

I have fix this error

wm18822827507 · June 5, 2020, 7:26am

I have reflash device tree. How do I make sure the configuration is works?

JerryChang · June 5, 2020, 7:46am

hello wm18822827507,

you may check the GPIO pin you’d configure for verification.
please check the pin under /sys/class/gpio, you may also refer to GPIO changes session for the GPIO number calculation,
thanks

wm18822827507 · June 5, 2020, 8:12am

I want to use pin 38 of J21, I cant use number “394” to control it create a square wave. but when i control it keep low, it’s returns to high after a short time. I think my config doesn’t work, and some thing is control it to hight.
tegra186-mb1-bct-pinmux-quill-p3310-1000-c03.txt (29.2 KB)

JerryChang · June 5, 2020, 9:20am

hello wm18822827507,

you may also disassembler the dtb file into txt file to review the settings. these settings were represent as hex values.
for example,

$ dtc -I dtb -O dts -o results.txt tegra186.dtb


        gpio@6000d000 {
...
                default {
                        gpio-input = <...>
                        gpio-output-low= <...>
                        gpio-output-high= <...>

wm18822827507 · June 5, 2020, 11:09am

I have disabled I2S0, nothing strange will happen now, of course, GPIO also fails, so I think I need to configure GPIO separately in the device tree, but I don’t know where to modify, because I don’t know what 6000D000 of this type of data represents, I don’t find my gpio config in pinmux@2430000 node. If I need to use flash.sh rebuild the kernel, some configuration of TeGRA186-quill-P3310-1000-a00-pinmux-gpio.cfg will take effect, and I’m used “p2771-0000-dsi-hdmi-dp.conf” conf file flash dtb,.

results.txt (443.5 KB)

pinmux@2430000 {
common {
linux,phandle = <0x1e>;
phandle = <0x1e>;
clk_aud_mclk_pj4 {
nvidia,pins = “aud_mclk_pj4”;
linux,phandle = <0x120>;
phandle = <0x120>;
};
jack_gpio_aud0_pj5 {
nvidia,pins = “gpio_aud0_pj5”;
linux,phandle = <0x121>;
phandle = <0x121>;
};
gpio_edp2_pp5 {
nvidia,pins = “gpio_edp2_pp5”;
nvidia,pull = <0x2>;
nvidia,tristate = <0x1>;
nvidia,enable-input = <0x1>;
status = “okay”;
};
gpio_edp3_pp6 {
nvidia,pins = “gpio_edp3_pp6”;
nvidia,pull = <0x0>;
nvidia,tristate = <0x0>;
nvidia,enable-input = <0x0>;
status = “okay”;
};
};

wm18822827507 · June 7, 2020, 7:33am

1.Do I need to modify pinmux, then t0 modify device tree, and finally modify the kernel code?
2.I want to configure gpio in the device tree as gpio mapping. Is this the same for TX2? if yes, Which file is the GPIO driver file of TX2?

JerryChang · June 8, 2020, 3:22am

hello wm18822827507,

you should have change the default configuration, if you’re using pinmux spreadsheet to generate dtsi files, and convert them as board configuration file. you’ll need to perform a full flash to update the board.
there’re several dtsi files to built as device tree file for board flashing,
for example,

[  17.4254 ] Writing partition kernel-dtb with tegra186-quill-p3310-1000-c03-00-base_sigheader.dtb.signed
[  17.4590 ] [................................................] 100%

you’ll also found below device tree as base file for customization,
for example,
$L4T_Sources/r32.4.2/JAX_TX2/Linux_for_Tegra/source/public/kernel_src/hardware/nvidia/platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-c03-00-base.dts

wm18822827507 · June 8, 2020, 3:38am

If i used pinmux spereadsheet to configure, my TX2 module will boot failure after a full flash. if i get TX2 device tree through " sudo dtc -I fs -O dts -o ./extracted.dts /proc/device-tree", than i can configure pinmux directly in the device tree, right?

JerryChang · June 8, 2020, 6:08am

hello wm18822827507,

yes, you can also have configuration by edit the device tree manually.
please also note that,
if you would like to have setting to be applied in MB1, then you’ll need to perform a flash process to update board configuration files.
thanks

wm18822827507 · June 8, 2020, 7:47am

What’s the meaning of “UNCLAIMED”? Is my configuration invalid?
Can you give me a sample to configure GPIO3_PJ.02 as GPIO?

pin 72 (DAP1_SCLK_PJ0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 73 (DAP1_DOUT_PJ1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 74 (DAP1_DIN_PJ2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 75 (DAP1_FS_PJ3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 76 (AUD_MCLK_PJ4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 77 (GPIO_AUD0_PJ5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 78 (GPIO_AUD1_PJ6): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 79 (GPIO_AUD2_PJ7): (MUX UNCLAIMED) (GPIO UNCLAIMED)

JerryChang · June 8, 2020, 8:01am

hello wm18822827507,

you may control it via system nodes. please refer to below as an example,

$ echo 324 > /sys/class/gpio/export 
$ cd /sys/class/gpio/gpio324/
$ echo out > direction
$ echo 1 > value

wm18822827507 · June 9, 2020, 12:59am

I want to config Pj0 ~6 pin as gpio, but it’s still i2s1, device tree doesn’t change.
I know how to get GPIO numbers, and I can drive them, but they are I2S pins, so sometimes there will be pulse generation automatically. I need to disable i2s1 and configure them as GPIO.

what does pinmux “tegra186-mb1-bct-pinmux-quill-p3310-1000-c03.cfg” doing?
Is it necessary to manually modify the device tree after modifying the pinmus？

pinmux spreadsheets

tegra186-mb1-bct-pinmux-quill-p3310-1000-c03.cfg slice

Tx2 module device get through “sudo dtc -I fs -O dts -o ./extracted.dts”

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TX2 J21 config pinmux as gpio in jetpack4.2

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