Nx dual hdmi setting

Leetop_z · October 19, 2020, 11:13am

Hi everyone
we desiged a carrier board for nx which have dual hdmi,one hdmi used DP0 from module,which desiged for dp_display in nv nx devkit ,the other used DP1 .The Hdmi on DP0 show nothing,The hdmi on DP1 show normally.
attachmet is my modify in dts file and dmesg that insert hdmi cable during bootup,please give some advise ,thanks everyone.
the dtsi file that modify:
— a/hardware/nvidia/platform/t19x/jakku/kernel-dts/common/tegra194-p3509-disp.dtsi
+++ b/hardware/nvidia/platform/t19x/jakku/kernel-dts/common/tegra194-p3509-disp.dtsi
@@ -51,20 +51,27 @@
nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
vdd-dp-pwr-supply = <&p3668_spmic_sd0>;
avdd-dp-pll-supply = <&p3668_spmic_sd1>;

vdd-edp-sec-mode-supply = <&battery_reg>;
vdd-dp-pad-supply = <&battery_reg>;
+// vdd-edp-sec-mode-supply = <&battery_reg>;
+// vdd-dp-pad-supply = <&battery_reg>;
vdd_hdmi_5v0-supply = <&p3509_vdd_hdmi_5v0>;
};

&sor0 {
status = “okay”;

nvidia,active-panel = <&sor0_dp_display>;

nvidia,active-panel = <&sor0_hdmi_display>;
+// nvidia,active-panel = <&sor0_dp_display>;
};

-&sor0_dp_display {

status = “okay”;
nvidia,is_ext_dp_panel = <1>;
+&sor0_hdmi_display{

status =“okay”;
```
   disp-default-out {
```

  nvidia,out-flags = <TEGRA_DC_OUT_HOTPLUG_LOW>;

};
};
+//&sor0_dp_display {
+// status = “okay”;
+// nvidia,is_ext_dp_panel = <1>;
+//};

&sor1 {
status = “okay”;

Leetop_z · October 19, 2020, 11:51am

Hi ,
insert hdmi cable the dmesg log is as below:
tegra-i2c 3190000.i2c: no acknowledge from address 0x50
tegra-i2c 3190000.i2c: no acknowledge from address 0x50
tegra-i2c 3190000.i2c: no acknowledge from address 0x50
tegra-i2c 3190000.i2c: no acknowledge from address 0x50
tegra-i2c 3190000.i2c: no acknowledge from address 0x50
tegradc 15210000.nvdisplay: blank - powerdown
tegradc 15210000.nvdisplay: unblank
tegra_nvdisp_handle_pd_enable: Unpowergated Head0 pd
tegra_nvdisp_handle_pd_enable: Unpowergated Head1 pd
tegra_nvdisp_handle_pd_enable: Unpowergated Head2 pd
tegra-i2c 3190000.i2c: no acknowledge from address 0x50
Parent Clock set for DC pll_d
tegra-i2c 3190000.i2c: no acknowledge from address 0x50
tegradc 15210000.nvdisplay: hdmi: tmds rate:85500K prod-setting:prod_c_hdmi_54m_111m
tegradc 15210000.nvdisplay: hdmi: get RGB quant from EDID.
tegradc 15210000.nvdisplay: hdmi: get YCC quant from EDID.
tegra-i2c 3190000.i2c: no acknowledge from address 0x50
tegra-i2c 3190000.i2c: no acknowledge from address 0x50
tegra-i2c 3190000.i2c: no acknowledge from address 0x50
tegradc 15200000.nvdisplay: hdmi: edid read failed
tegradc 15200000.nvdisplay: hdmi: using fallback edid
extcon-disp-state external-connection:disp-state: cable 46 state 1
Extcon AUX0(HDMI) enable
tegradc 15200000.nvdisplay: blank - powerdown
tegradc 15200000.nvdisplay: unblank
Parent Clock set for DC plld2
tegradc 15200000.nvdisplay: hdmi: tmds rate:74250K prod-setting:prod_c_hdmi_54m_111m
tegradc 15200000.nvdisplay: hdmi: get RGB quant from EDID.
tegradc 15200000.nvdisplay: hdmi: get YCC quant from EDID.
tegra-i2c 3190000.i2c: no acknowledge from address 0x50
extcon-disp-state external-connection:disp-state: cable 47 state 1
Extcon AUX1(HDMI) enable
extcon-disp-state external-connection:disp-state: cable 40 state 1
Extcon HDMI: HPD enabled
tegradc 15210000.nvdisplay: hdmi: plugged
extcon-disp-state external-connection:disp-state: cable 51 state 1
Extcon HDMI: HPD enabled
tegradc 15200000.nvdisplay: hdmi: plugged
tegradc 15200000.nvdisplay: Invalid out_w + out_x (1366) > hActive (1280)
OR/AND out_h + out_y (768) > vActive (720)
for WIN 0
tegradc 15200000.nvdisplay: blank - powerdown
extcon-disp-state external-connection:disp-state: cable 47 state 0
Extcon AUX1(HDMI) disable
tegradc 15200000.nvdisplay: unblank
Parent Clock set for DC plld2
tegradc 15200000.nvdisplay: hdmi: tmds rate:85800K prod-setting:prod_c_hdmi_54m_111m
tegradc 15200000.nvdisplay: hdmi: get RGB quant from EDID.
tegradc 15200000.nvdisplay: hdmi: get YCC quant from EDID.
tegra-i2c 3190000.i2c: no acknowledge from address 0x50
extcon-disp-state external-connection:disp-state: cable 47 state 1
Extcon AUX1(HDMI) enable
tegradc 15200000.nvdisplay: unblank
tegradc 15210000.nvdisplay: blank - powerdown
extcon-disp-state external-connection:disp-state: cable 46 state 0
Extcon AUX0(HDMI) disable
tegra_nvdisp_handle_pd_disable: Powergated Head2 pd
tegradc 15210000.nvdisplay: unblank
tegra_nvdisp_handle_pd_enable: Unpowergated Head2 pd
Parent Clock set for DC pll_d
tegradc 15210000.nvdisplay: hdmi: tmds rate:74250K prod-setting:prod_c_hdmi_54m_111m
tegradc 15210000.nvdisplay: hdmi: get RGB quant from EDID.
tegradc 15210000.nvdisplay: hdmi: get YCC quant from EDID.
extcon-disp-state external-connection:disp-state: cable 46 state 1
Extcon AUX0(HDMI) enable
tegradc 15210000.nvdisplay: unblank
tegradc 15200000.nvdisplay: unblank
tegradc 15210000.nvdisplay: unblank
tegradc 15200000.nvdisplay: unblank
tegradc 15210000.nvdisplay: blank - powerdown
extcon-disp-state external-connection:disp-state: cable 46 state 0
Extcon AUX0(HDMI) disable
tegra_nvdisp_handle_pd_disable: Powergated Head2 pd
tegradc 15210000.nvdisplay: unblank
tegra_nvdisp_handle_pd_enable: Unpowergated Head2 pd
Parent Clock set for DC pll_d
tegradc 15210000.nvdisplay: hdmi: tmds rate:85500K prod-setting:prod_c_hdmi_54m_111m
tegradc 15210000.nvdisplay: hdmi: get RGB quant from EDID.
tegradc 15210000.nvdisplay: hdmi: get YCC quant from EDID.
extcon-disp-state external-connection:disp-state: cable 46 state 1
Extcon AUX0(HDMI) enable
tegradc 15210000.nvdisplay: unblank
tegradc 15200000.nvdisplay: blank - powerdown
extcon-disp-state external-connection:disp-state: cable 47 state 0
Extcon AUX1(HDMI) disable
tegradc 15200000.nvdisplay: unblank
Parent Clock set for DC plld2
tegradc 15200000.nvdisplay: hdmi: tmds rate:74250K prod-setting:prod_c_hdmi_54m_111m
tegradc 15200000.nvdisplay: hdmi: get RGB quant from EDID.
tegradc 15200000.nvdisplay: hdmi: get YCC quant from EDID.
tegra-i2c 3190000.i2c: no acknowledge from address 0x50
extcon-disp-state external-connection:disp-state: cable 47 state 1
Extcon AUX1(HDMI) enable
tegradc 15200000.nvdisplay: unblank
tegradc 15210000.nvdisplay: unblank

WayneWWW · October 20, 2020, 2:46am

Please check the pinmux setting of dpaux0 and dpaux1. You should use the same setting as the HDMI port on DP1.

Leetop_z · October 20, 2020, 3:44am

Hi WayneWWW,
I disable dpaux0 in dtsi hardware/nvidia/platform/t19x/jakku/kernel-dts/common/tegra194-p3509-disp.dtsi,and issue is same ,hdmi can not show,if i disable dpaux1,the hdmi that work normal block in bootup logo.
I check the dpaux0 and dpaux1 ,but don’t find the file about pinmux setting of dpaux0 and dpaux1,could you give some tips,thanks.

WayneWWW · October 20, 2020, 4:08am

Sorry for my mistake. No need to disable dpaux.

Go to Linux_for_Tegra/bootloader/t186ref and fine the cfg file for your pinmux.

Leetop_z · October 20, 2020, 5:14am

Hi wayneWWW,
check spreedsheet of Jetson_Xavier_NX_Pinmux_Configuration_Template_v1.06,DP0 and DP1 is same,

Pinmux version 1.0

Input pinmux file name: tegra19x-jetson_xavier_nx_module-pinmux.dtsi

Input gpio file name: tegra19x-jetson_xavier_nx_module-gpio-default.dtsi

Generation date: 2020-08-31 10:02

PLEASE DO NOT EDIT THIS FILE

This is autogenerated file using the script pinmux-dts2cfg.py

pinmux.major = 1;
pinmux.minor = 0;

Pinmux for gpio-input pins

pinmux.0x022136e0 = 0x00000001; # CONFIG S7
pinmux.0x02431008 = 0x00000000; # GPIO soc_gpio32_ps7
pinmux.0x02214000 = 0x00000001; # CONFIG G0
pinmux.0x02434058 = 0x00000000; # GPIO soc_gpio00_pg0
pinmux.0x02214080 = 0x00000001; # CONFIG G4
pinmux.0x02434070 = 0x00000000; # GPIO soc_gpio08_pg4
pinmux.0x022140e0 = 0x00000001; # CONFIG G7
pinmux.0x02434088 = 0x00000000; # GPIO soc_gpio11_pg7
pinmux.0x02214260 = 0x00000001; # CONFIG H3
pinmux.0x02434038 = 0x00000000; # GPIO uart4_tx_ph3
pinmux.0x022142a0 = 0x00000001; # CONFIG H5
pinmux.0x02434028 = 0x00000000; # GPIO uart4_rts_ph5
pinmux.0x02212200 = 0x00000001; # CONFIG Y0
pinmux.0x0243d048 = 0x00000000; # GPIO spi3_sck_py0
pinmux.0x02212220 = 0x00000001; # CONFIG Y1
pinmux.0x0243d008 = 0x00000000; # GPIO spi3_miso_py1
pinmux.0x02212240 = 0x00000001; # CONFIG Y2
pinmux.0x0243d060 = 0x00000000; # GPIO spi3_mosi_py2
pinmux.0x02212260 = 0x00000001; # CONFIG Y3
pinmux.0x0243d018 = 0x00000000; # GPIO spi3_cs0_py3
pinmux.0x02212280 = 0x00000001; # CONFIG Y4
pinmux.0x0243d028 = 0x00000000; # GPIO spi3_cs1_py4
pinmux.0x022122a0 = 0x00000001; # CONFIG Y5
pinmux.0x0243d098 = 0x00000000; # GPIO uart5_tx_py5
pinmux.0x022122e0 = 0x00000001; # CONFIG Y7
pinmux.0x0243d0a0 = 0x00000000; # GPIO uart5_rts_py7
pinmux.0x02212420 = 0x00000001; # CONFIG Z1
pinmux.0x0243d0b0 = 0x00000000; # GPIO usb_vbus_en0_pz1
pinmux.0x02212460 = 0x00000001; # CONFIG Z3
pinmux.0x0243d040 = 0x00000000; # GPIO spi1_sck_pz3
pinmux.0x02212480 = 0x00000001; # CONFIG Z4
pinmux.0x0243d020 = 0x00000000; # GPIO spi1_miso_pz4
pinmux.0x022124a0 = 0x00000001; # CONFIG Z5
pinmux.0x0243d058 = 0x00000000; # GPIO spi1_mosi_pz5
pinmux.0x022124c0 = 0x00000001; # CONFIG Z6
pinmux.0x0243d010 = 0x00000000; # GPIO spi1_cs0_pz6
pinmux.0x022124e0 = 0x00000001; # CONFIG Z7
pinmux.0x0243d050 = 0x00000000; # GPIO spi1_cs1_pz7
pinmux.0x0c2f1000 = 0x00000001; # CONFIG EE0
pinmux.0x0c301010 = 0x00000000; # GPIO safe_state_pee0
pinmux.0x0c2f1080 = 0x00000001; # CONFIG EE4
pinmux.0x0c301038 = 0x00000000; # GPIO power_on_pee4
pinmux.0x0c2f1280 = 0x00000001; # CONFIG CC4
pinmux.0x0c302000 = 0x00000000; # GPIO touch_clk_pcc4
pinmux.0x02212c20 = 0x00000001; # CONFIG Q1
pinmux.0x02430058 = 0x00000000; # GPIO soc_gpio21_pq1
pinmux.0x02212c60 = 0x00000001; # CONFIG Q3
pinmux.0x02430068 = 0x00000000; # GPIO soc_gpio23_pq3
pinmux.0x02212ca0 = 0x00000001; # CONFIG Q5
pinmux.0x02430028 = 0x00000000; # GPIO soc_gpio41_pq5
pinmux.0x02212cc0 = 0x00000001; # CONFIG Q6
pinmux.0x02430030 = 0x00000000; # GPIO soc_gpio42_pq6
pinmux.0x02212e00 = 0x00000001; # CONFIG R0
pinmux.0x02430040 = 0x00000000; # GPIO soc_gpio44_pr0
pinmux.0x02212e80 = 0x00000001; # CONFIG R4
pinmux.0x02430098 = 0x00000000; # GPIO uart1_rts_pr4
pinmux.0x02212ea0 = 0x00000001; # CONFIG R5
pinmux.0x02430090 = 0x00000000; # GPIO uart1_cts_pr5
pinmux.0x02213240 = 0x00000001; # CONFIG L2
pinmux.0x02437008 = 0x00000000; # GPIO pex_wake_n_pl2
pinmux.0x02212820 = 0x00000001; # CONFIG N1
pinmux.0x02440020 = 0x00000000; # GPIO soc_gpio54_pn1

Pinmux for gpio-output-low pins

pinmux.0x02214040 = 0x00000003; # CONFIG G2
pinmux.0x0221404c = 0x00000000; # CONTROL G2
pinmux.0x02214050 = 0x00000000; # OUTPUT G2
pinmux.0x02434048 = 0x00000000; # GPIO soc_gpio02_pg2
pinmux.0x02212000 = 0x00000003; # CONFIG X0
pinmux.0x0221200c = 0x00000000; # CONTROL X0
pinmux.0x02212010 = 0x00000000; # OUTPUT X0
pinmux.0x0243d000 = 0x00000000; # GPIO gpu_pwr_req_px0
pinmux.0x0c2f16a0 = 0x00000003; # CONFIG AA5
pinmux.0x0c2f16ac = 0x00000000; # CONTROL AA5
pinmux.0x0c2f16b0 = 0x00000000; # OUTPUT AA5
pinmux.0x0c303028 = 0x00000000; # GPIO can0_en_paa5
pinmux.0x0c2f1200 = 0x00000003; # CONFIG CC0
pinmux.0x0c2f120c = 0x00000000; # CONTROL CC0
pinmux.0x0c2f1210 = 0x00000000; # OUTPUT CC0
pinmux.0x0c302048 = 0x00000000; # GPIO spi2_sck_pcc0
pinmux.0x0c2f1240 = 0x00000003; # CONFIG CC2
pinmux.0x0c2f124c = 0x00000000; # CONTROL CC2
pinmux.0x0c2f1250 = 0x00000000; # OUTPUT CC2
pinmux.0x0c302028 = 0x00000000; # GPIO spi2_mosi_pcc2
pinmux.0x0c2f1260 = 0x00000003; # CONFIG CC3
pinmux.0x0c2f126c = 0x00000000; # CONTROL CC3
pinmux.0x0c2f1270 = 0x00000000; # OUTPUT CC3
pinmux.0x0c302038 = 0x00000000; # GPIO spi2_cs0_pcc3
pinmux.0x02212a80 = 0x00000003; # CONFIG P4
pinmux.0x02212a8c = 0x00000000; # CONTROL P4
pinmux.0x02212a90 = 0x00000000; # OUTPUT P4
pinmux.0x02430070 = 0x00000000; # GPIO soc_gpio04_pp4
pinmux.0x02212aa0 = 0x00000003; # CONFIG P5
pinmux.0x02212aac = 0x00000000; # CONTROL P5
pinmux.0x02212ab0 = 0x00000000; # OUTPUT P5
pinmux.0x02430078 = 0x00000000; # GPIO soc_gpio05_pp5
pinmux.0x02214e00 = 0x00000003; # CONFIG B0
pinmux.0x02214e0c = 0x00000000; # CONTROL B0
pinmux.0x02214e10 = 0x00000000; # OUTPUT B0
pinmux.0x02446008 = 0x00000000; # GPIO cpu_pwr_req_0_pb0

Pinmux for gpio-output-high pins

pinmux.0x0c2f1220 = 0x00000003; # CONFIG CC1
pinmux.0x0c2f122c = 0x00000000; # CONTROL CC1
pinmux.0x0c2f1230 = 0x00000001; # OUTPUT CC1
pinmux.0x0c302050 = 0x00000000; # GPIO spi2_miso_pcc1

Pinmux for used pins

pinmux.0x02431020 = 0x00000400; # aud_mclk_ps4: aud, tristate-disable, input-disable, lpdr-disable
pinmux.0x02431060 = 0x00000440; # dap3_sclk_pt1: i2s3, tristate-disable, input-enable, lpdr-disable
pinmux.0x02431058 = 0x00000400; # dap3_dout_pt2: i2s3, tristate-disable, input-disable, lpdr-disable
pinmux.0x02431050 = 0x00000450; # dap3_din_pt3: i2s3, tristate-enable, input-enable, lpdr-disable
pinmux.0x02431048 = 0x00000440; # dap3_fs_pt4: i2s3, tristate-disable, input-enable, lpdr-disable
pinmux.0x02431080 = 0x00000440; # dap5_sclk_pt5: i2s5, tristate-disable, input-enable, lpdr-disable
pinmux.0x02431078 = 0x00000400; # dap5_dout_pt6: i2s5, tristate-disable, input-disable, lpdr-disable
pinmux.0x02431070 = 0x00000450; # dap5_din_pt7: i2s5, tristate-enable, input-enable, lpdr-disable
pinmux.0x02431068 = 0x00000440; # dap5_fs_pu0: i2s5, tristate-disable, input-enable, lpdr-disable
pinmux.0x02438000 = 0x0000a460; # sdmmc1_clk_pj0: sdmmc1, tristate-disable, input-enable, loopback-enable
pinmux.0x02438008 = 0x0000a448; # sdmmc1_cmd_pj1: sdmmc1, pull-up, tristate-disable, input-enable
pinmux.0x02438030 = 0x0000a448; # sdmmc1_dat0_pj2: sdmmc1, pull-up, tristate-disable, input-enable
pinmux.0x02438028 = 0x0000a448; # sdmmc1_dat1_pj3: sdmmc1, pull-up, tristate-disable, input-enable
pinmux.0x02438020 = 0x0000a448; # sdmmc1_dat2_pj4: sdmmc1, pull-up, tristate-disable, input-enable
pinmux.0x02438018 = 0x0000a448; # sdmmc1_dat3_pj5: sdmmc1, pull-up, tristate-disable, input-enable
pinmux.0x0243a030 = 0x0000a460; # sdmmc3_clk_po0: sdmmc3, tristate-disable, input-enable, loopback-enable
pinmux.0x0243a028 = 0x0000a448; # sdmmc3_cmd_po1: sdmmc3, pull-up, tristate-disable, input-enable
pinmux.0x0243a018 = 0x0000a448; # sdmmc3_dat0_po2: sdmmc3, pull-up, tristate-disable, input-enable
pinmux.0x0243a010 = 0x0000a448; # sdmmc3_dat1_po3: sdmmc3, pull-up, tristate-disable, input-enable
pinmux.0x0243a008 = 0x0000a448; # sdmmc3_dat2_po4: sdmmc3, pull-up, tristate-disable, input-enable
pinmux.0x0243a000 = 0x0000a448; # sdmmc3_dat3_po5: sdmmc3, pull-up, tristate-disable, input-enable
pinmux.0x02445058 = 0x00022400; # eqos_txc_pe0: eqos, tristate-disable, input-disable
pinmux.0x02445018 = 0x00022400; # eqos_td0_pe1: eqos, tristate-disable, input-disable
pinmux.0x02445010 = 0x00022400; # eqos_td1_pe2: eqos, tristate-disable, input-disable
pinmux.0x02445008 = 0x00022400; # eqos_td2_pe3: eqos, tristate-disable, input-disable
pinmux.0x02445000 = 0x00022400; # eqos_td3_pe4: eqos, tristate-disable, input-disable
pinmux.0x02445068 = 0x00022400; # eqos_tx_ctl_pe5: eqos, tristate-disable, input-disable
pinmux.0x02445040 = 0x00022450; # eqos_rd0_pe6: eqos, tristate-enable, input-enable
pinmux.0x02445030 = 0x00022450; # eqos_rd1_pe7: eqos, tristate-enable, input-enable
pinmux.0x02445028 = 0x00022450; # eqos_rd2_pf0: eqos, tristate-enable, input-enable
pinmux.0x02445020 = 0x00022470; # eqos_rd3_pf1: eqos, tristate-enable, input-enable
pinmux.0x02445070 = 0x00022450; # eqos_rx_ctl_pf2: eqos, tristate-enable, input-enable
pinmux.0x02445060 = 0x00022450; # eqos_rxc_pf3: eqos, tristate-enable, input-enable
pinmux.0x02445038 = 0x00022440; # eqos_sma_mdio_pf4: eqos, tristate-disable, input-enable
pinmux.0x02445048 = 0x00022400; # eqos_sma_mdc_pf5: eqos, tristate-disable, input-disable
pinmux.0x0243b020 = 0x00023460; # qspi0_sck_pc0: qspi0, tristate-disable, input-enable, loopback-enable
pinmux.0x0243b028 = 0x00023400; # qspi0_cs_n_pc1: qspi0, tristate-disable, input-disable
pinmux.0x0243b018 = 0x00023440; # qspi0_io0_pc2: qspi0, tristate-disable, input-enable
pinmux.0x0243b010 = 0x00023440; # qspi0_io1_pc3: qspi0, tristate-disable, input-enable
pinmux.0x0243b008 = 0x00023440; # qspi0_io2_pc4: qspi0, tristate-disable, input-enable
pinmux.0x0243b000 = 0x00023440; # qspi0_io3_pc5: qspi0, tristate-disable, input-enable
pinmux.0x02436008 = 0x00002460; # sdmmc4_clk: sdmmc4, tristate-disable, input-enable, loopback-enable
pinmux.0x02436010 = 0x00002440; # sdmmc4_cmd: sdmmc4, tristate-disable, input-enable
pinmux.0x02436058 = 0x00002448; # sdmmc4_dat0: sdmmc4, pull-up, tristate-disable, input-enable
pinmux.0x02436050 = 0x00002448; # sdmmc4_dat1: sdmmc4, pull-up, tristate-disable, input-enable
pinmux.0x02436048 = 0x00002448; # sdmmc4_dat2: sdmmc4, pull-up, tristate-disable, input-enable
pinmux.0x02436040 = 0x00002448; # sdmmc4_dat3: sdmmc4, pull-up, tristate-disable, input-enable
pinmux.0x02436038 = 0x00002448; # sdmmc4_dat4: sdmmc4, pull-up, tristate-disable, input-enable
pinmux.0x02436030 = 0x00002448; # sdmmc4_dat5: sdmmc4, pull-up, tristate-disable, input-enable
pinmux.0x02436028 = 0x00002448; # sdmmc4_dat6: sdmmc4, pull-up, tristate-disable, input-enable
pinmux.0x02436020 = 0x00002448; # sdmmc4_dat7: sdmmc4, pull-up, tristate-disable, input-enable
pinmux.0x02436018 = 0x00000450; # sdmmc4_dqs: sdmmc4, tristate-enable, input-enable
pinmux.0x02434080 = 0x00000410; # soc_gpio10_pg6: gp, tristate-enable, input-disable, lpdr-disable
pinmux.0x02434098 = 0x00000401; # soc_gpio13_ph1: gp, tristate-disable, input-disable, lpdr-disable
pinmux.0x02434060 = 0x00000540; # gen1_i2c_scl_pi3: i2c1, tristate-disable, input-enable, io_high_voltage-disable, lpdr-enable
pinmux.0x02434068 = 0x00000540; # gen1_i2c_sda_pi4: i2c1, tristate-disable, input-enable, io_high_voltage-disable, lpdr-enable
pinmux.0x0243d038 = 0x00000410; # gp_pwm2_px2: gp, tristate-enable, input-disable, lpdr-disable
pinmux.0x0243d070 = 0x00000400; # uart2_tx_px4: uartb, tristate-disable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x0243d078 = 0x00000450; # uart2_rx_px5: uartb, tristate-enable, input-enable, io_high_voltage-disable, lpdr-disable
pinmux.0x0243d080 = 0x00000408; # uart2_rts_px6: uartb, pull-up, tristate-disable, input-disable, lpdr-disable
pinmux.0x0243d088 = 0x00000458; # uart2_cts_px7: uartb, pull-up, tristate-enable, input-enable, lpdr-disable
pinmux.0x0c301000 = 0x00000400; # shutdown_n: shutdown, tristate-disable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x0c301018 = 0x00000458; # vcomp_alert_pee1: soc, pull-up, tristate-enable, input-enable, lpdr-disable
pinmux.0x0c301040 = 0x00000440; # pwr_i2c_scl_pee5: i2c5, tristate-disable, input-enable, io_high_voltage-disable, lpdr-disable
pinmux.0x0c301048 = 0x00000440; # pwr_i2c_sda_pee6: i2c5, tristate-disable, input-enable, io_high_voltage-disable, lpdr-disable
pinmux.0x0c301028 = 0x00000458; # batt_oc_pee3: soc, pull-up, tristate-enable, input-enable, lpdr-disable
pinmux.0x0c303010 = 0x0000c400; # can0_dout_paa2: can0, tristate-disable, input-disable
pinmux.0x0c303018 = 0x0000c450; # can0_din_paa3: can0, tristate-enable, input-enable
pinmux.0x0c302010 = 0x00000400; # uart3_tx_pcc5: uartc, tristate-disable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x0c302008 = 0x00000450; # uart3_rx_pcc6: uartc, tristate-enable, input-enable, io_high_voltage-disable, lpdr-disable
pinmux.0x0c302030 = 0x00000560; # gen2_i2c_scl_pcc7: i2c2, tristate-disable, input-enable, io_high_voltage-enable, lpdr-enable
pinmux.0x0c302040 = 0x00000560; # gen2_i2c_sda_pdd0: i2c2, tristate-disable, input-enable, io_high_voltage-enable, lpdr-enable
pinmux.0x0c302020 = 0x00000560; # gen8_i2c_scl_pdd1: i2c8, tristate-disable, input-enable, io_high_voltage-enable, lpdr-enable
pinmux.0x0c302018 = 0x00000560; # gen8_i2c_sda_pdd2: i2c8, tristate-disable, input-enable, io_high_voltage-enable, lpdr-enable
pinmux.0x02430008 = 0x00000400; # extperiph1_clk_pp0: extperiph1, tristate-disable, input-disable, lpdr-disable
pinmux.0x02430000 = 0x00000400; # extperiph2_clk_pp1: extperiph2, tristate-disable, input-disable, lpdr-disable
pinmux.0x02430018 = 0x00000460; # cam_i2c_scl_pp2: i2c3, tristate-disable, input-enable, io_high_voltage-enable, lpdr-disable
pinmux.0x02430010 = 0x00000460; # cam_i2c_sda_pp3: i2c3, tristate-disable, input-enable, io_high_voltage-enable, lpdr-disable
pinmux.0x02430088 = 0x0000045a; # soc_gpio07_pp7: soc, pull-up, tristate-enable, input-enable, io_high_voltage-disable, lpdr-disable
pinmux.0x02430060 = 0x00000459; # soc_gpio22_pq2: nv, pull-up, tristate-enable, input-enable, lpdr-disable
pinmux.0x024300a8 = 0x00000400; # uart1_tx_pr2: uarta, tristate-disable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x024300a0 = 0x00000454; # uart1_rx_pr3: uarta, pull-down, tristate-enable, input-enable, io_high_voltage-disable, lpdr-disable
pinmux.0x02437048 = 0x00000560; # pex_l4_clkreq_n_pl0: pe4, tristate-disable, input-enable, io_high_voltage-enable, lpdr-enable
pinmux.0x02437050 = 0x00000520; # pex_l4_rst_n_pl1: pe4, tristate-disable, input-disable, io_high_voltage-enable, lpdr-enable
pinmux.0x02440030 = 0x00000450; # dp_aux_ch0_hpd_pm0: dp, tristate-enable, input-enable, io_high_voltage-disable, lpdr-disable
pinmux.0x02440038 = 0x00000450; # dp_aux_ch1_hpd_pm1: dp, tristate-enable, input-enable, io_high_voltage-disable, lpdr-disable
pinmux.0x02440050 = 0x00000460; # hdmi_cec_pm4: hdmi, tristate-disable, input-enable, io_high_voltage-enable, lpdr-disable
pinmux.0x02431008 = 0x00000058; # soc_gpio32_ps7: rsvd0, pull-up, tristate-enable, input-enable, lpdr-disable
pinmux.0x02434058 = 0x00000058; # soc_gpio00_pg0: rsvd0, pull-up, tristate-enable, input-enable, lpdr-disable
pinmux.0x02434048 = 0x00000000; # soc_gpio02_pg2: rsvd0, tristate-disable, input-disable, lpdr-disable
pinmux.0x02434070 = 0x00000050; # soc_gpio08_pg4: rsvd0, tristate-enable, input-enable, lpdr-disable
pinmux.0x02434088 = 0x00000058; # soc_gpio11_pg7: rsvd0, pull-up, tristate-enable, input-enable, lpdr-disable
pinmux.0x02434038 = 0x00000051; # uart4_tx_ph3: rsvd1, tristate-enable, input-enable, lpdr-disable
pinmux.0x02434028 = 0x00000051; # uart4_rts_ph5: rsvd1, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d000 = 0x00000000; # gpu_pwr_req_px0: rsvd0, tristate-disable, input-disable, lpdr-disable
pinmux.0x0243d048 = 0x00000055; # spi3_sck_py0: rsvd1, pull-down, tristate-enable, input-enable, io_high_voltage-disable, lpdr-disable
pinmux.0x0243d008 = 0x00000055; # spi3_miso_py1: rsvd1, pull-down, tristate-enable, input-enable, io_high_voltage-disable, lpdr-disable
pinmux.0x0243d060 = 0x00000055; # spi3_mosi_py2: rsvd1, pull-down, tristate-enable, input-enable, io_high_voltage-disable, lpdr-disable
pinmux.0x0243d018 = 0x00000055; # spi3_cs0_py3: rsvd1, pull-down, tristate-enable, input-enable, io_high_voltage-disable, lpdr-disable
pinmux.0x0243d028 = 0x00000055; # spi3_cs1_py4: rsvd1, pull-down, tristate-enable, input-enable, io_high_voltage-disable, lpdr-disable
pinmux.0x0243d098 = 0x00000051; # uart5_tx_py5: rsvd1, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d0a0 = 0x00000051; # uart5_rts_py7: rsvd1, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d0b0 = 0x00000049; # usb_vbus_en0_pz1: rsvd1, pull-up, tristate-disable, input-enable, io_high_voltage-disable, lpdr-disable
pinmux.0x0243d040 = 0x00000055; # spi1_sck_pz3: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d020 = 0x00000055; # spi1_miso_pz4: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d058 = 0x00000055; # spi1_mosi_pz5: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d010 = 0x00000059; # spi1_cs0_pz6: rsvd1, pull-up, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d050 = 0x00000059; # spi1_cs1_pz7: rsvd1, pull-up, tristate-enable, input-enable, lpdr-disable
pinmux.0x0c301010 = 0x00000051; # safe_state_pee0: rsvd1, tristate-enable, input-enable, io_high_voltage-disable, lpdr-disable
pinmux.0x0c301038 = 0x00000058; # power_on_pee4: rsvd0, pull-up, tristate-enable, input-enable, lpdr-disable
pinmux.0x0c303028 = 0x0000c000; # can0_en_paa5: rsvd0, tristate-disable, input-disable
pinmux.0x0c302048 = 0x00000002; # spi2_sck_pcc0: rsvd2, tristate-disable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x0c302050 = 0x00000002; # spi2_miso_pcc1: rsvd2, tristate-disable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x0c302028 = 0x00000002; # spi2_mosi_pcc2: rsvd2, tristate-disable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x0c302038 = 0x00000002; # spi2_cs0_pcc3: rsvd2, tristate-disable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x0c302000 = 0x00000056; # touch_clk_pcc4: rsvd2, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x02430070 = 0x00000000; # soc_gpio04_pp4: rsvd0, tristate-disable, input-disable, lpdr-disable
pinmux.0x02430078 = 0x00000000; # soc_gpio05_pp5: rsvd0, tristate-disable, input-disable, lpdr-disable
pinmux.0x02430058 = 0x00000054; # soc_gpio21_pq1: rsvd0, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x02430068 = 0x00000058; # soc_gpio23_pq3: rsvd0, pull-up, tristate-enable, input-enable, lpdr-disable
pinmux.0x02430020 = 0x00000426; # soc_gpio40_pq4: rsvd2, pull-down, tristate-disable, input-disable, io_high_voltage-enable, lpdr-disable
pinmux.0x02430028 = 0x0000005a; # soc_gpio41_pq5: rsvd2, pull-up, tristate-enable, input-enable, io_high_voltage-disable, lpdr-disable
pinmux.0x02430030 = 0x0000005a; # soc_gpio42_pq6: rsvd2, pull-up, tristate-enable, input-enable, io_high_voltage-disable, lpdr-disable
pinmux.0x02430038 = 0x00000426; # soc_gpio43_pq7: rsvd2, pull-down, tristate-disable, input-disable, io_high_voltage-enable, lpdr-disable
pinmux.0x02430040 = 0x00000056; # soc_gpio44_pr0: rsvd2, pull-down, tristate-enable, input-enable, io_high_voltage-disable, lpdr-disable
pinmux.0x02430048 = 0x00000431; # soc_gpio45_pr1: rsvd1, tristate-enable, input-disable, io_high_voltage-enable, lpdr-disable
pinmux.0x02430098 = 0x00000055; # uart1_rts_pr4: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x02430090 = 0x00000055; # uart1_cts_pr5: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x02446008 = 0x00000000; # cpu_pwr_req_0_pb0: rsvd0, tristate-disable, input-disable, lpdr-disable
pinmux.0x02437008 = 0x00000178; # pex_wake_n_pl2: rsvd0, pull-up, tristate-enable, input-enable, io_high_voltage-enable, lpdr-enable
pinmux.0x02440020 = 0x00000058; # soc_gpio54_pn1: rsvd0, pull-up, tristate-enable, input-enable, lpdr-disable

Pinmux for unused pins for low-power configuration

pinmux.0x02431040 = 0x00000415; # dap1_sclk_ps0: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x02431038 = 0x00000415; # dap1_dout_ps1: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x02431030 = 0x00000415; # dap1_din_ps2: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x02431028 = 0x00000415; # dap1_fs_ps3: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x02431018 = 0x00000414; # soc_gpio30_ps5: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x02431010 = 0x00000414; # soc_gpio31_ps6: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x02431000 = 0x00000414; # soc_gpio33_pt0: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x0243b050 = 0x00023435; # qspi1_sck_pc6: rsvd1, pull-down, tristate-enable, input-disable, loopback-enable
pinmux.0x0243b058 = 0x00023415; # qspi1_cs_n_pc7: rsvd1, pull-down, tristate-enable, input-disable
pinmux.0x0243b048 = 0x00023415; # qspi1_io0_pd0: rsvd1, pull-down, tristate-enable, input-disable
pinmux.0x0243b040 = 0x00023415; # qspi1_io1_pd1: rsvd1, pull-down, tristate-enable, input-disable
pinmux.0x0243b038 = 0x00023415; # qspi1_io2_pd2: rsvd1, pull-down, tristate-enable, input-disable
pinmux.0x0243b030 = 0x00023415; # qspi1_io3_pd3: rsvd1, pull-down, tristate-enable, input-disable
pinmux.0x02434050 = 0x00000414; # soc_gpio01_pg1: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x02434040 = 0x00000414; # soc_gpio03_pg3: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x02434078 = 0x00000414; # soc_gpio09_pg5: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x02434090 = 0x00000414; # soc_gpio12_ph0: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x024340a0 = 0x00000414; # soc_gpio14_ph2: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x02434030 = 0x00000415; # uart4_rx_ph4: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x02434020 = 0x00000415; # uart4_cts_ph6: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x02434018 = 0x00000415; # dap2_sclk_ph7: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x02434008 = 0x00000415; # dap2_dout_pi0: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x02434000 = 0x00000415; # dap2_din_pi1: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x02434010 = 0x00000415; # dap2_fs_pi2: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x0243d068 = 0x00000414; # cv_pwr_req_px1: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x0243d030 = 0x00000415; # gp_pwm3_px3: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x0243d090 = 0x00000415; # uart5_rx_py6: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x0243d0a8 = 0x00000415; # uart5_cts_pz0: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x0243d0b8 = 0x00000415; # usb_vbus_en1_pz2: rsvd1, pull-down, tristate-enable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x0c301060 = 0x00000415; # ao_retention_n_pee2: rsvd1, pull-down, tristate-enable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x0c303000 = 0x0000c415; # can1_dout_paa0: rsvd1, pull-down, tristate-enable, input-disable
pinmux.0x0c303008 = 0x0000c415; # can1_din_paa1: rsvd1, pull-down, tristate-enable, input-disable
pinmux.0x0c303020 = 0x0000c414; # can0_stb_paa4: rsvd0, pull-down, tristate-enable, input-disable
pinmux.0x0c303030 = 0x0000c414; # can0_wake_paa6: rsvd0, pull-down, tristate-enable, input-disable
pinmux.0x0c303038 = 0x0000c414; # can0_err_paa7: rsvd0, pull-down, tristate-enable, input-disable
pinmux.0x0c303040 = 0x0000c414; # can1_stb_pbb0: rsvd0, pull-down, tristate-enable, input-disable
pinmux.0x0c303048 = 0x0000c414; # can1_en_pbb1: rsvd0, pull-down, tristate-enable, input-disable
pinmux.0x0c303050 = 0x0000c414; # can1_wake_pbb2: rsvd0, pull-down, tristate-enable, input-disable
pinmux.0x0c303058 = 0x0000c414; # can1_err_pbb3: rsvd0, pull-down, tristate-enable, input-disable
pinmux.0x02430080 = 0x00000414; # soc_gpio06_pp6: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x02430050 = 0x00000414; # soc_gpio20_pq0: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x02432018 = 0x0000c416; # dap6_sclk_pa0: rsvd2, pull-down, tristate-enable, input-disable
pinmux.0x02432010 = 0x0000c416; # dap6_dout_pa1: rsvd2, pull-down, tristate-enable, input-disable
pinmux.0x02432008 = 0x0000c416; # dap6_din_pa2: rsvd2, pull-down, tristate-enable, input-disable
pinmux.0x02432000 = 0x0000c416; # dap6_fs_pa3: rsvd2, pull-down, tristate-enable, input-disable
pinmux.0x02432038 = 0x0000c416; # dap4_sclk_pa4: rsvd2, pull-down, tristate-enable, input-disable
pinmux.0x02432030 = 0x0000c416; # dap4_dout_pa5: rsvd2, pull-down, tristate-enable, input-disable
pinmux.0x02432028 = 0x0000c416; # dap4_din_pa6: rsvd2, pull-down, tristate-enable, input-disable
pinmux.0x02432020 = 0x0000c416; # dap4_fs_pa7: rsvd2, pull-down, tristate-enable, input-disable
pinmux.0x02446000 = 0x00000414; # cpu_pwr_req_1_pb1: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x02441008 = 0x00022435; # ufs0_ref_clk_pff0: rsvd1, pull-down, tristate-enable, input-disable
pinmux.0x02441000 = 0x00022435; # ufs0_rst_pff1: rsvd1, pull-down, tristate-enable, input-disable
pinmux.0x02437020 = 0x00000415; # pex_l0_clkreq_n_pk0: rsvd1, pull-down, tristate-enable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x02437028 = 0x00000415; # pex_l0_rst_n_pk1: rsvd1, pull-down, tristate-enable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x02437010 = 0x00000415; # pex_l1_clkreq_n_pk2: rsvd1, pull-down, tristate-enable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x02437018 = 0x00000415; # pex_l1_rst_n_pk3: rsvd1, pull-down, tristate-enable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x02437000 = 0x00000415; # pex_l2_clkreq_n_pk4: rsvd1, pull-down, tristate-enable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x02437030 = 0x00000415; # pex_l2_rst_n_pk5: rsvd1, pull-down, tristate-enable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x02437038 = 0x00000415; # pex_l3_clkreq_n_pk6: rsvd1, pull-down, tristate-enable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x02437040 = 0x00000415; # pex_l3_rst_n_pk7: rsvd1, pull-down, tristate-enable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x02437058 = 0x00000415; # sata_dev_slp_pl3: rsvd1, pull-down, tristate-enable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x02440040 = 0x00000416; # dp_aux_ch2_hpd_pm2: rsvd2, pull-down, tristate-enable, input-disable, io_high_voltage-disable
pinmux.0x02440048 = 0x00000416; # dp_aux_ch3_hpd_pm3: rsvd2, pull-down, tristate-enable, input-disable, io_high_voltage-disable
pinmux.0x02440000 = 0x00000414; # soc_gpio50_pm5: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x02440008 = 0x00000414; # soc_gpio51_pm6: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x02440010 = 0x00000414; # soc_gpio52_pm7: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x02440018 = 0x00000414; # soc_gpio53_pn0: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x02440028 = 0x00000414; # soc_gpio55_pn2: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable

Leetop_z · October 20, 2020, 5:25am

the spreedsheet of DP0 and DP1 :

WayneWWW · October 20, 2020, 6:26am

Hi,

Could you enable nvdisplay w.r.t the port we are checking and disable all the other ports now?

Otherwise the log will be messed up together in dmesg and hard to read.

Leetop_z · October 20, 2020, 6:35am

hi WayneWWW,
what is the nvdiplay w.r.t the port and how to disable them,thanks.

WayneWWW · October 20, 2020, 6:38am

The display controller in dts is called nvdisplay.

Please check which nvidsplay is using the sor we are trying to check.

Keep it open and disable all the others.

Leetop_z · October 20, 2020, 7:00am

Hi WayneWWW,
found the problem is the schematics of hdmi wrong, DP_TXD0_P should be hdmi land2, that we degisn it as hdmi lane0.
could DP_TXD0_P be modify ad hdmi lane0 by sw.
Jumper it by hardware, and hdmi on DP0 can display.
but HDMI on DP0 cannot show login seesion during bootup ,but HDMI on DP1 can show login seesion , Do it design so about this solution, the DP0 is just extented to display?

WayneWWW · October 20, 2020, 7:07am

could DP_TXD0_P be modify ad hdmi lane0 by sw.

Search below setting in dts and swap the order to 0 1 2 3 4 can help.

nvidia,xbar-ctrl

Leetop_z · October 20, 2020, 8:02am

Hi WayneWWW
I change nvidia,xbar-ctrl from <0x2 0x1 0x0 0x3 0x4> to <0x0 0x1 0x2 0x3 0x4> of sor0 node in tegra194-soc-base.dtsi,
both can display ,but hmdi on DP0 show normal , hdmi on DP1 block in nvidia logo;it is opposite .
the dmesg log show:

nvidia-desktop login: [ 9.171019] tegradc 15210000.nvdisplay: dc_hdmi_out_enable: couldn’t get regulator avdd_hdmi
[ 36.947297] tegradc 15210000.nvdisplay: dc_hdmi_out_enable: couldn’t get regulator avdd_hdmi
[ 369.948847] tegradc 15210000.nvdisplay: dc_hdmi_out_enable: couldn’t get regulator avdd_hdmi
[ 370.189825] tegradc 15210000.nvdisplay: dc_hdmi_out_enable: couldn’t get regulator avdd_hdmi
[ 804.628180] tegradc 15210000.nvdisplay: dc_hdmi_out_enable: couldn’t get regulator avdd_hdmi
[ 804.809122] tegradc 15210000.nvdisplay: dc_hdmi_out_enable: couldn’t get regulator avdd_hdmi

WayneWWW · October 20, 2020, 8:09am

If you don’t need that regulator, just set it to battery_reg as a dummy one.

Leetop_z · October 20, 2020, 8:53am

it need that regulator, modify nvidia,xbar-ctrl show both display,but one hdmi block during bootup just stop at nvidia logo .

WayneWWW · October 20, 2020, 9:04am

Hi,

Please check hardware/nvidia/platform/t19x/jakku/kernel-dts/common/tegra194-p3509-disp.dtsi and add the regulator there.

Leetop_z · October 20, 2020, 9:34am

Hi WayneWWW
nvidia,xbar-ctrl work