How to change HDMI to eDP in dp1

[b]Hi, we made a board use edp in dp1, I changed tegra186-quill-p3310-1000-c03-00-base.dtb but the edp doesn’t work

I attach the dts ,[/b]

nvdisplay@15210000 {
compatible = “nvidia,tegra186-dc”;
reg = <0x0 0x15210000 0x0 0x10000>;
interrupts = <0x0 0x9a 0x4>;
win-mask = <0x18>;
#stream-id-cells = <0x1>;
nvidia,dc-ctrlnum = <0x1>;
clocks = <0xa2 0xd 0x9c 0xd 0x9e 0xd 0x9b 0xd 0x9f 0xd 0xa0 0xd 0x9d 0xd 0x10d 0xd 0x206 0xd 0x10b 0xd 0x207 0xd 0x210 0xd 0x3a 0xd 0x261>;
clock-names = “clk32k_in”, “nvdisplay_disp”, “nvdisplayhub”, “nvdisplay_p0”, “nvdisplay_p1”, “nvdisplay_p2”, “nvdisp_dsc”, “pllp_display”, “pll_d”, “pll_d_out1”, “plld2”, “plld3”, “disp2_emc”, “emc_latency”;
resets = <0xd 0x5c 0xd 0x5d 0xd 0x5e 0xd 0x5f 0xd 0x60 0xd 0x61 0xd 0x62 0xd 0x5a>;
reset-names = “misc”, “wgrp0”, “wgrp1”, “wgrp2”, “wgrp3”, “wgrp4”, “wgrp5”, “head1”;
status = “okay”;
nvidia,dc-flags = <0x1>;
nvidia,emc-clk-rate = <0x11e1a300>;
nvidia,fb-bpp = <0x20>;
nvidia,fb-flags = <0x1>;
nvidia,fb-win = <0x3>;
nvidia,dc-or-node = “/host1x/sor1”;
nvidia,cmu-enable = <0x1>;
avdd_lcd-supply = <0xa3>;
dvdd_lcd-supply = <0xa4>;
avdd_dsi_csi-supply = <0x23>;
outp-supply = <0xa5>;
outn-supply = <0xa6>;
vdd_lcd_bl-supply = <0x1a>;
vdd_lcd_bl_en-supply = <0x92>;
avdd_hdmi-supply = <0xa7>;
avdd_hdmi_pll-supply = <0xe>;
vdd_hdmi_5v0-supply = <0xa8>;
linux,phandle = <0x4d>;
phandle = <0x4d>;
};

       sor1 {
		compatible = "nvidia,tegra186-sor1";
		reg = <0x0 0x15580000 0x0 0x40000>;
		interrupts = <0x0 0x9e 0x4>;
		nvidia,xbar-ctrl = <0x0 0x1 0x2 0x3 0x4>;
		clocks = <0xa2 0xd 0x5d 0xd 0x27 0xd 0x268 0xd 0x129 0xd 0x10d 0xd 0x88 0xd 0x66 0xd 0x58 0xd 0x62>;
		clock-names = "clk32k_in", "sor1", "sor_safe", "sor1_pad_clkout", "sor1_out", "pllp_out0", "maud", "hda", "hda2codec_2x", "hda2hdmi";
		resets = <0xd 0x6c 0xd 0xf 0xd 0x10 0xd 0x11>;
		reset-names = "sor1", "hda_rst", "hda2codec_2x_rst", "hda2hdmi_rst";
		pad-controllers = <0x10 0x19>;
		pad-names = "hdmi-dp1";
		status = "okay";
		nvidia,ddc-i2c-bus = <0x80>;
		nvidia,hpd-gpio = <0x12 0x79 0x1>;

		prod-settings {
			#prod-cells = <0x3>;
			prod_list_hdmi_soc = "prod_c_hdmi_0m_54m", "prod_c_hdmi_54m_111m", "prod_c_hdmi_111m_223m", "prod_c_hdmi_223m_300m", "prod_c_hdmi_300m_600m";

			prod_c_hdmi_0m_54m {
				prod = <0x138 0xffffffff 0x333a3a3a 0x148 0xffffffff 0x0 0x58c 0xf0f0f00 0x5050000 0x590 0xf01f00 0x301f00 0x598 0xff000ff0 0x38000440 0x5a0 0x40ff00 0x0 0x5a8 0xff000000 0x54000000>;
			};

			prod_c_hdmi_54m_111m {
				prod = <0x138 0xffffffff 0x333a3a3a 0x148 0xffffffff 0x0 0x58c 0xf0f0f00 0x5050100 0x590 0xf01f00 0x301f00 0x598 0xff000ff0 0x38000440 0x5a0 0x40ff00 0x400000 0x5a8 0xff000000 0x44000000>;
			};

			prod_c_hdmi_111m_223m {
				prod = <0x138 0xffffffff 0x373a3a3a 0x148 0xffffffff 0x0 0x58c 0xf0f0f00 0x5050300 0x590 0xf01f00 0x301f00 0x598 0xff000ff0 0x38000440 0x5a0 0x40ff00 0x400000 0x5a8 0xff000000 0x34000000>;
			};

			prod_c_hdmi_223m_300m {
				prod = <0x138 0xffffffff 0x333d3d3d 0x148 0xffffffff 0x0 0x58c 0xf0f0f00 0x5050300 0x590 0xf01f00 0x301f00 0x598 0xff000ff0 0x38000440 0x5a0 0x40ff00 0x404000 0x5a8 0xff000000 0x34000000>;
			};

			prod_c_hdmi_300m_600m {
				prod = <0x138 0xffffffff 0x333d3d3d 0x148 0xffffffff 0x0 0x58c 0xf0f0f00 0x5050300 0x590 0xf01f00 0x301900 0x598 0xff000ff0 0x38000440 0x5a0 0x40ff00 0x406000 0x5a8 0xff000000 0x34000000>;
			};

			prod_c_54M {
				prod = <0x58c 0xf0f0f00 0x5050000 0x590 0xf01f00 0x301f00 0x598 0xff000ff0 0x38000440 0x138 0xffffffff 0x333a3a3a 0x148 0xffffffff 0x0 0x5a0 0x40ff00 0x0 0x5a8 0xff000000 0x54000000>;
			};

			prod_c_75M {
				prod = <0x58c 0xf0f0f00 0x5050100 0x590 0xf01f00 0x301f00 0x598 0xff000ff0 0x38000440 0x138 0xffffffff 0x333a3a3a 0x148 0xffffffff 0x0 0x5a0 0x40ff00 0x400000 0x5a8 0xff000000 0x44000000>;
			};

			prod_c_150M {
				prod = <0x58c 0xf0f0f00 0x5050300 0x590 0xf01f00 0x301f00 0x598 0xff000ff0 0x38000440 0x138 0xffffffff 0x373a3a3a 0x148 0xffffffff 0x0 0x5a0 0x40ff00 0x400000 0x5a8 0xff000000 0x34000000>;
			};

			prod_c_300M {
				prod = <0x58c 0xf0f0f00 0x5050300 0x590 0xf01f00 0x301f00 0x598 0xff000ff0 0x38000440 0x138 0xffffffff 0x333d3d3d 0x148 0xffffffff 0x0 0x5a0 0x40ff00 0x404000 0x5a8 0xff000000 0x34000000>;
			};

			prod_c_600M {
				prod = <0x58c 0xf0f0f00 0x5050300 0x590 0xf01f00 0x301900 0x598 0xff000ff0 0x38000440 0x138 0xffffffff 0x333d3d3d 0x148 0xffffffff 0x0 0x5a0 0x40ff00 0x406000 0x5a8 0xff000000 0x34000000>;
			};

			prod_c_dp {
				prod = <0x58c 0xf0f0f10 0x5050310 0x590 0x3000100 0x100 0x594 0xf0000000 0x0 0x598 0x2ff0 0x2440 0x59c 0x401800 0x0 0x5a0 0x400000 0x400000 0x5a8 0xff000000 0x34000000 0x70 0xffffffff 0x0 0x180 0x1 0x1>;
			};

			prod_c_hbr {
				prod = <0x590 0xf00000 0x300000>;
			};

			prod_c_hbr2 {
				prod = <0x590 0xf00000 0x400000>;
			};

			prod_c_rbr {
				prod = <0x590 0xf00000 0x300000>;
			};
		};

		hdmi-display {
			status = "disabled";
			compatible = "hdmi,display";
			generic-infoframe-type = <0x87>;

			disp-default-out {
				nvidia,out-type = <0x1>;
				nvidia,out-flags = <0x2>;
				nvidia,out-parent-clk = "plld2";
				nvidia,out-align = <0x0>;
				nvidia,out-order = <0x0>;
				nvidia,out-xres = <0x1000>;
				nvidia,out-yres = <0x870>;
			};
		};

                    panel-a-edp-1080p-14-0 {
			status = "ok";
			compatible = "a-edp,1080p-14-0";
			nvidia,tx-pu-disable = <0x1>;
			nvidia,panel-rst-gpio = <0x12 0x7b 0x1>;
			nvidia,is_ext_dp_panel = <0x0>;

			disp-default-out {
				nvidia,out-type = <0x3>;
				nvidia,out-align = <0x0>;
				nvidia,out-order = <0x0>;
				nvidia,out-flags = <0x0>;
				nvidia,out-pins = <0x1 0x0 0x2 0x0 0x3 0x0 0x0 0x1>;
				nvidia,out-depth = <0x12>;
				nvidia,out-parent-clk = "plld3";
			};

			dp-lt-settings {

				lt-setting@0 {
					nvidia,drive-current = <0x0 0x0 0x0 0x0>;
					nvidia,lane-preemphasis = <0x0 0x0 0x0 0x0>;
					nvidia,post-cursor = <0x0 0x0 0x0 0x0>;
					nvidia,tx-pu = <0x0>;
					nvidia,load-adj = <0x3>;
				};

				lt-setting@1 {
					nvidia,drive-current = <0x0 0x0 0x0 0x0>;
					nvidia,lane-preemphasis = <0x0 0x0 0x0 0x0>;
					nvidia,post-cursor = <0x0 0x0 0x0 0x0>;
					nvidia,tx-pu = <0x0>;
					nvidia,load-adj = <0x4>;
				};

				lt-setting@2 {
					nvidia,drive-current = <0x0 0x0 0x0 0x0>;
					nvidia,lane-preemphasis = <0x1 0x1 0x1 0x1>;
					nvidia,post-cursor = <0x0 0x0 0x0 0x0>;
					nvidia,tx-pu = <0x0>;
					nvidia,load-adj = <0x6>;
				};
			};

			smartdimmer {
				status = "disabled";
				nvidia,use-auto-pwm = <0x0>;
				nvidia,hw-update-delay = <0x0>;
				nvidia,bin-width = <0xffffffff>;
				nvidia,aggressiveness = <0x5>;
				nvidia,use-vid-luma = <0x0>;
				nvidia,phase-in-settings = <0x0>;
				nvidia,phase-in-adjustments = <0x0>;
				nvidia,k-limit-enable = <0x1>;
				nvidia,k-limit = <0xc8>;
				nvidia,sd-window-enable = <0x0>;
				nvidia,soft-clipping-enable = <0x1>;
				nvidia,soft-clipping-threshold = <0x80>;
				nvidia,smooth-k-enable = <0x0>;
				nvidia,smooth-k-incr = <0x40>;
				nvidia,coeff = <0x5 0x9 0x2>;
				nvidia,fc = <0x0 0x0>;
				nvidia,blp = <0x400 0xff>;
				nvidia,bltf = <0x39 0x41 0x49 0x52 0x5c 0x67 0x72 0x7d 0x8a 0x96 0xa4 0xb2 0xc1 0xd0 0xe0 0xf1>;
				nvidia,lut = <0xff 0xff 0xff 0xc7 0xc7 0xc7 0x99 0x99 0x99 0x74 0x74 0x74 0x55 0x55 0x55 0x3b 0x3b 0x3b 0x24 0x24 0x24 0x11 0x11 0x11 0x0 0x0 0x0>;
				nvidia,use-vpulse2 = <0x1>;
				nvidia,bl-device-name = "pwm-backlight";
			};
		};

	};
            dpaux@155c0000 {
		compatible = "nvidia,tegra186-dpaux";
		reg = <0x0 0x155c0000 0x0 0x40000>;
		interrupts = <0x0 0x9f 0x4>;
		clocks = <0xa2 0xd 0x60 0xd 0x20b>;
		clock-names = "clk32k_in", "dpaux", "plldp";
		resets = <0xd 0x5>;
		reset-names = "dpaux";
		power-domains = <0xaf>;
		status = "disabled";

		prod-settings {
			#prod-cells = <0x3>;

			prod_c_dpaux_dp {
				prod = <0x124 0x37fe 0x24c2>;
			};

			prod_c_dpaux_hdmi {
				prod = <0x124 0x700 0x400>;
			};
		};
	};

	dpaux@15040000 {
		compatible = "nvidia,tegra186-dpaux1";
		reg = <0x0 0x15040000 0x0 0x40000>;
		interrupts = <0x0 0xa0 0x4>;
		clocks = <0xa2 0xd 0x5f 0xd 0x20b>;
		clock-names = "clk32k_in", "dpaux1", "plldp";
		resets = <0xd 0x7c>;
		reset-names = "dpaux1";
		power-domains = <0xaf>;
		status = "okay";

		prod-settings {
			#prod-cells = <0x3>;

			prod_c_dpaux_dp {
				prod = <0x124 0x37fe 0x24c2>;
			};

			prod_c_dpaux_hdmi {
				prod = <0x124 0x700 0x400>;
			};
		};
	};

and the dmesg log

nvidia@tegra-ubuntu:~$ [ 15.271286] fuse init (API version 7.23)
[ 17.854438] IPVS: Creating netns size=1424 id=2
[ 19.839065] tegradc 15210000.nvdisplay: blank - powerdown
[ 21.380724] PD DISP2 index4 DOWN
[ 21.381407] PD DISP1 index3 DOWN
[ 21.381791] PD DISP0 index2 DOWN
[ 21.401997] tegradc 15210000.nvdisplay: unblank
[ 21.402093] PD DISP0 index2 UP
[ 21.406621] PD DISP1 index3 UP
[ 21.406785] PD DISP2 index4 UP
[ 21.411282] regulator_get() failed for (15210000.nvdisplay,vdd_ds_1v8), -19
[ 21.411286] vdd_ds_1v8 regulator get failed
[ 21.411288] edp regulator get failed
[ 21.412083] Parent Clock set for DC plld3
[ 21.416031] tegradc 15210000.nvdisplay: dp: HPD is not detected
[ 21.416046] tegradc 15210000.nvdisplay: dp: Failed to write DPCD data. CMD 0x600, Status 0x0
[ 21.416073] tegradc 15210000.nvdisplay: dp: HPD is not detected
[ 21.416083] tegradc 15210000.nvdisplay: dp: Failed to write DPCD data. CMD 0x600, Status 0x0
[ 21.416108] tegradc 15210000.nvdisplay: dp: HPD is not detected
[ 21.416118] tegradc 15210000.nvdisplay: dp: Failed to write DPCD data. CMD 0x600, Status 0x0
[ 21.416144] tegradc 15210000.nvdisplay: dp: HPD is not detected
[ 21.416153] tegradc 15210000.nvdisplay: dp: Failed to write DPCD data. CMD 0x600, Status 0x0
[ 21.416163] tegradc 15210000.nvdisplay: dp: failed to exit panel power save mode (0xfffffff2)
[ 22.512353] tegradc 15210000.nvdisplay: unblank
[ 24.902231] IPVS: Creating netns size=1424 id=3
[ 315.731670] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[ 952.281822] tegradc 15210000.nvdisplay: blank - powerdown
[ 954.818335] PD DISP2 index4 DOWN
[ 954.818540] PD DISP1 index3 DOWN
[ 954.818701] PD DISP0 index2 DOWN

if I set the sor1 as dp not for edp, the dmesg means it didn’t receive the dp:plug event and 15210000 power-down.
I don’t know which value to set as below, should I need to set vdd_ds_1v8-supply in nvdisplay@15210000 ?

                    nvidia,fb-bpp = <0x20>; ?
		nvidia,fb-flags = <0x1>;
		nvidia,fb-win = <0x0>;
		nvidia,dc-or-node = "/host1x/sor";
		nvidia,cmu-enable = <0x1>;
		avdd_lcd-supply = <0xa3>;
		dvdd_lcd-supply = <0xa4>;
		avdd_dsi_csi-supply = <0x23>;
		outp-supply = <0xa5>;
		outn-supply = <0xa6>;
		vdd_lcd_bl-supply = <0x1a>;
		vdd_lcd_bl_en-supply = <0x92>;
		avdd_hdmi-supply = <0xa7>;
		avdd_hdmi_pll-supply = <0xe>;
		vdd_hdmi_5v0-supply = <0xa8>;
		vdd_ds_1v8-supply = <0xa4>;

Thanks for help!

Hi,

Some suggestions

  1. Please verify it on rel-28.1 release (jetpack3.1) first. I am not sure if latest release is stable on eDP or not.

  2. I think you could refer to “tegra186-quill-p3310-1000-c00-00-auo-1080p-edp.dts” dt. Though it is still on dp0.

  3. Please check if your pinmux is correct. Default pinmux from jetpack does not enable dp1 pin.

Hi Wayne, thanks for your suggestion, I will check it on rel-28.1, could you give me some advice on setting pinmux for dp1.

Please download the spreadsheet of TX2 pinmux from below link.
http://developer.nvidia.com/embedded/dlc/jetson-tx2-module-pinmux

Enable the pin you need (dp1,dp1_aux,dp1_hpd), and generate the config/dts.