cudaMallocManaged on jetson devices


I want to understand better the difference between Unified Memory and Pinned Memory on jetson devices.
As I read here: Memory Management, both will be accessible on CPU and iGPU, but what is the best practice for large buffers? I plan to access those buffers from CPU, NPPI and CUDA kernels.


Question regarding Jetson platforms typically received better / faster / more numerous responses in the sub-forums dedicated to them:

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Before posting on a jetson forum:

If you study table 1 as well as section 4.1 you may get some insight from that.

Anyone trying to help you would likely immediately want to know concepts covered there, such as what is the compute capability of your device, and do you need coherent (for the sake of this discussion, lets say “simultaneous”) access between CPU and GPU.

You likely would be able to create a more focused posting on the Jetson forum of your choice, by giving some thought to what is presented in the document you linked.

If it were me, to a first order approximation, and with no additional information, I would say that the “cached” characteristic(s) of managed memory on Jetson (as indicated in table 1) vs. the “uncached” characteristic of pinned memory on Jetson, would cause me to immediately prefer managed memory for general usage.

If you are unfamiliar with what a cache is and why it might be interesting, that concept is not unique or specific to CUDA or Jetson, a google search will enlighten.

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Thanks for the information!