Define at Pinmux a AON GPIO to be an Input does not take affect

Robotics & Edge Computing Jetson Systems Jetson AGX Orin
,
1

Hi,

I have a problem when trying to define “A62 - SOC_GPIO50 - GPIO3_PBB.02” as an input.
That is defined in the devkit as “CAM_FRSYNC1 (CIM PIN#85)”.

Jetson Orin AGX 64GB, JetPeck 36.4.4

soc_gpio50_pbb2 {
nvidia,pins = “soc_gpio50_pbb2”;
nvidia,function = “gp”;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
nvidia,lpdr = <TEGRA_PIN_DISABLE>;
};

I do not see any changes when monitoring the IO.
The cmd “gpioget -c 1 10” always returns 1, even when connecting a scope to the line, I see 0 (study 0)
gpiomon -c 1 10

I thought maybe my design is worng so I changed the pin at the pinmux to be output, and I see instead of 3.3V a ~2V, which is good as the two resistors are “fighting” between them. Meaning I’m on the right PIN.

I know that it belongs to the camera (all camera dtsi are using it), but I did not load or include any camera dtsi files.

This is the pinmux filename:
tegra234-mb1-bct-pinmux-p3701-0000-a04.dtsi

The same thing occurs on the devkit, but I did not know the whole line where it goes, and if something else drives it at the devkit.

Event add it to the gpio.dtis to be defined as input:
filename: tegra234-mb1-bct-gpio-p3701-0000.dtsi

	gpio@c2f0000 {
		gpio-init-names = "default";
		gpio-init-0 = <&gpio_aon_default>;

		gpio_aon_default: default {
			gpio-input = <
                ....
				TEGRA234_AON_GPIO(BB, 2)
				>;
			gpio-output-low = <
                 ....
				>;
			gpio-output-high = <
				...
				>;
		};
	};

What am I missing? :(

Update:
Used the spreadsheet from NVIDIA Jetson and generated the same PIN to be GPIO and INPUT PULL NONE, got the same gpio.dtsi and pinmux as i wrote.
does not help.

4

Hi adinner900,

Do you want to use this pin as GPIO/Input?
If so, have you configured it as following from pinmux spreadsheet?
image

To use GPIO with JP6.x, please apply the patch from the following thread.
40hdr - SPI1 gpio padctl register bit[10] effect by gpiod tools in JP6 - #20 by KevinFFF
It will prevent the SFIO bit being set.

5

Hi,

Thanks for the reply

And yes, I’m trying to define it as GPIO INPUT

image

The pinmux generated is:

soc_gpio50_pbb2 {
	nvidia,pins = "soc_gpio50_pbb2";
	nvidia,function = "rsvd0";                 
	nvidia,pull = <TEGRA_PIN_PULL_UP>;
	nvidia,tristate = <TEGRA_PIN_ENABLE>;
	nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};

	gpio@c2f0000 {
		gpio-init-names = "default";
		gpio-init-0 = <&gpio_aon_default>;

		gpio_aon_default: default {
			gpio-input = <
                ...
				TEGRA234_AON_GPIO(BB, 2)

After fixing the pinmux, I am able to read the states in the userpsace but from the UEFI, the GPIO reads as 0 always.

From the UEFI Shell:

GpioUtil.efi --id 0x0106000A --input

Shows always 0 even though I see clearly in the scope 1 logic.

7

Please refer to AGX xavier with Jetpack 5.1.1:How do I get GPIO status in UEFI? - #8 by KevinFFF to read GPIO state in UEFI.