We are facing a performance issue with a custom carrier board that uses Jetson Xavier NX interfaced with a Qualcomm QCA9377 based Wifi/BT chipset. We believe the issue is due to clock gating in sdhci interface to the wifi chipset. The clock is being supplied from SDIO to Wifi chipset only during activity and in other cases the clock is turned off.
We are able to achieve good performance when we continuously send SDIO commands to Wifi chip asynchronously for debug purpose to validate that the issue is due to clock not being sent to Wifi chipset. How can we provide continuous clock form sdio interface to the wifi chip using any tegra kernel patch or dts entry?
We were looking into this issue and found certain dts entries which were supposed to prevent clock gating like nvidia,disable-rtpm and disable-dynamic-clock-gating but didn’t see any improvements in performance.
Are there any ways to ensure continuous clock from sdhci3 ? I have listed my current dts entry for reference
sdhci_wifi: sdhci@3440000{
compatible = "nvidia,tegra194-sdhci";
dma-coherent;
max-clk-limit = <50000000>;
bus-width = <0x4>;
cap-mmc-highspeed;
nvidia,clock-always-on;
disable-dynamic-clock-gating;
cap-sdio-irq;
force-non-removable-rescan;
cap-sd-highspeed;
sd-uhs-sdr104;
sd-uhs-sdr50;
sd-uhs-sdr25;
sd-uhs-sdr12;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
only-1-8-v;
non-removable;
nvidia,disable-rtpm;
nvidia,vqmmc-always-on;
status = "okay";
/delete-property/ cd-inverted ;
};