EMC Memory Addresses on AGX Xavier Industrial

Hi NVIDIA forum,

We are trying to do real-time access of ECC errors to do a comparison of Orin and Xavier industrial modules during a radiation test. We were given the following code to access ECC errors in JetPack 5 in Orin, now that the ARM RAS drivers have been moved into ARM TrustedFirmware-A and away from the kernel.

I wanted to ask:

  1. Does this method work to access the EMC status registers on AGX Xavier as well? I can’t find the documentation for this. Otherwise, is there any other way to access ECC error counts in JP5 on?
  2. Does this also work for errors that occur in cache and not DDR memory?

Thank you!

  1. Xavier doesn’t looks like implement the firewall to block the REG access did you try on Xavier for the REG access?

Answer to 1 is Yes. you can use the script. There is no other way.
Answer to 2 is, Any Memory error in SOC is reported as RAS error from ATF

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