Hi Folks -
I’ve been looking into ARMv8.2’s RAS protocols, the L2/L3 ECC protections, and general system monitoring for health and error trapping. The ARM documentation suggests that all of the RAS and ECC performance reporting is implementation dependent. I’ve been looking around but haven’t found any information detailing the Nvidia implementation. Does the Xavier / Carmel implementation include RAS? Has this been implemented in Tegra?
I’d greatly appreciate a pointer to any available documentation or implementation examples.