Enabling an Interrupt GPIo


can I enable a GPIO pin on the 40 pin expansion header to be an interrupt line without modifying the pinmux table? Is there any library I can use for interrupt handling in c?

hello aplb,

there’s developer guide, Configuring the 40-Pin Expansion Header you may refer to by using Jetson-IO.

Thank you. However, there are still a couple parts that are unclear:

1.) It seems like I don’t need to enable interrupts, as the pins are already pre enabled as an interrupt in the original image?

2.)Is there a C library to implement interrupts in user space?


hello aplb,

here’s forum discussion thread for your reference, gpio interrupts from user space.
you may also access L4T sources packages from download center for reference,
please refer to below source, by checking cd_gpio for an example to process an interrupt from a GPIO.


Thanks Jerry,

So if I understand correctly. We enable the interrupt through the device tree file. The interrupt handler is in kernel space but we can actually communicate with the handler through user space?

hello aplb,

that’s correct,
please also refer to pinmux spreadsheets for the default board configurations.
you may have customization if you’re doing with SFIO/GPIO,

Hi Jerry,
Thank you. A couple things that I am confused about:

  1. I want to use GPIO09(AUD_MCLK) as a hardware interrupt in user space. How do I know whether this has already been designated as a rising edge interrupt? Is that in the device tree file?
  2. If I have to modify the device tree file to set GPIO09 as an interrupt, how do I assign that pin as an interrupt with high priority?
    I saw this Thread (GPIO and Interrupts - #3 by jake) but am confused what to put for the interrupt-parent and interrupt parameters.


hello aplb,

please check cd_gpio in the sdhci-tegra.c kernel driver to process an interrupt from a GPIO.
for example, there’s definition in device tree.

        sdhci_sd: sdhci@3400000 {
                mmc-ocr-mask = <0x0>;
                cd-gpios = <&tegra_main_gpio TEGRA194_MAIN_GPIO(G, 7) 0>;
                mmc-ocr-mask = <0>;
                vmmc-supply = <&p3668_vdd_sdmmc1_sw>;
                status = "okay";

there’s NX’s default pinmux configuration shows as below, it’s SFIO.

pinmux.0x02431020 = 0x00000400; # aud_mclk_ps4: aud, tristate-disable, input-disable, lpdr-disable

you may configure pinmux spreadsheets to make it as GPIO pin as below,

		gpio_default: default {
			gpio-input = <
				TEGRA_GPIO(S, 4)

after that,
please refer to Jetson Xavier NX and Jetson AGX Xavier Series MB1 Platform Configuration, you should able to control GPIO09 after the board configuration update,

I think you are talking about a few different steps here.

  1. Do you have an example of a device tree configuration file that uses an interrupt on the AUD_MCLK pin?
  2. which DTSI file do I modify? I am using the Jetson NX Dev Kit.


hello aplb,

I don’t have an example to use an interrupt on the AUD_MCLK pin.
you may refer to sdhci-tegra.c kernel driver to process an interrupt from a GPIO.

according to NX’s default pinmux configuration, AUD_MCLK is configured as SFIO. you should have pinmux customization to change it as GPIO, and flashing the board to update the board configuration file.
since you’re working with Jetson NX Dev Kit, check device tree sources under Jakku folder.
for example,