Flash issus with eeprom at I2C bus 1 at address 0x56

Hello,

in our custom Jetson Nano carrier board, we have connected a Eeprom (BRCF016GWZ-3E2) to the first i2c bus.

The eeprom responds to the i2c addresses 0x50 - 0x57.

When we try to flash the SOM it fails with the following error:

* Flashing target device started. *
Welcome to Tegra Flash
version 1.0.0
Type ? or help for help and q or quit to exit
Use ! to execute system commands
 
[   0.0019 ] tegrasign --getmode mode.txt --key None
[   0.0028 ] Assuming zero filled SBK key
[   0.0030 ] 
[   0.0032 ] Generating RCM messages
[   0.0049 ] tegrarcm --listrcm rcm_list.xml --chip 0x21 0 --download rcm nvtboot_recovery.bin 0 0
[   0.0058 ] RCM 0 is saved as rcm_0.rcm
[   0.0064 ] RCM 1 is saved as rcm_1.rcm
[   0.0065 ] List of rcm files are saved in rcm_list.xml
[   0.0065 ] 
[   0.0065 ] Signing RCM messages
[   0.0081 ] tegrasign --key None --list rcm_list.xml --pubkeyhash pub_key.key
[   0.0090 ] Assuming zero filled SBK key
[   0.0170 ] 
[   0.0170 ] Copying signature to RCM mesages
[   0.0189 ] tegrarcm --chip 0x21 0 --updatesig rcm_list_signed.xml
[   0.0204 ] 
[   0.0204 ] Parsing partition layout
[   0.0224 ] tegraparser --pt flash.xml.tmp
[   0.0231 ] 
[   0.0232 ] Using default ramcode: 0
[   0.0232 ] Disable BPMP dtb trim, using default dtb
[   0.0232 ] 
[   0.0232 ] Creating list of images to be signed
[   0.0252 ] tegrahost --chip 0x21 0 --partitionlayout flash.xml.bin --list images_list.xml
[   0.0619 ] 
[   0.0619 ] Generating signatures
[   0.0639 ] tegrasign --key None --list images_list.xml --pubkeyhash pub_key.key
[   0.0648 ] Assuming zero filled SBK key
[   0.5636 ] 
[   0.5637 ] Generating br-bct
[   0.5661 ] tegrabct --bct P3448_A00_lpddr4_204Mhz_P987.cfg --chip 0x21 0
[   0.5701 ] 
[   0.5702 ] Updating boot device parameters
[   0.5723 ] tegrabct --bct P3448_A00_lpddr4_204Mhz_P987.bct --chip 0x21 0 --updatedevparam flash.xml.bin
[   0.5731 ] Warning: No sdram params
[   0.5734 ] 
[   0.5734 ] Updating bl info
[   0.5755 ] tegrabct --bct P3448_A00_lpddr4_204Mhz_P987.bct --chip 0x21 0 --updateblinfo flash.xml.bin --updatesig images_list_signed.xml
[   0.5771 ] 
[   0.5772 ] Updating secondary storage information into bct
[   0.5794 ] tegraparser --pt flash.xml.bin --chip 0x21 0 --updatecustinfo P3448_A00_lpddr4_204Mhz_P987.bct
[   0.5807 ] 
[   0.5808 ] Updating Odmdata
[   0.5829 ] tegrabct --bct P3448_A00_lpddr4_204Mhz_P987.bct --chip 0x21 0 --updatefields Odmdata =0xa4000
[   0.5840 ] Warning: No sdram params
[   0.5843 ] 
[   0.5843 ] Get Signed section of bct
[   0.5865 ] tegrabct --bct P3448_A00_lpddr4_204Mhz_P987.bct --chip 0x21 0 --listbct bct_list.xml
[   0.5876 ] 
[   0.5876 ] Signing BCT
[   0.5919 ] tegrasign --key None --list bct_list.xml --pubkeyhash pub_key.key
[   0.5928 ] Assuming zero filled SBK key
[   0.5936 ] 
[   0.5936 ] Updating BCT with signature
[   0.5959 ] tegrabct --bct P3448_A00_lpddr4_204Mhz_P987.bct --chip 0x21 0 --updatesig bct_list_signed.xml
[   0.5972 ] 
[   0.5973 ] Copying signatures
[   0.5995 ] tegrahost --chip 0x21 0 --partitionlayout flash.xml.bin --updatesig images_list_signed.xml
[   0.6400 ] 
[   0.6401 ] Updating BFS information on BCT
[   0.6424 ] tegrabct --bct P3448_A00_lpddr4_204Mhz_P987.bct --chip 0x21 0 --updatebfsinfo flash.xml.bin
[   0.6433 ]    BFS:
[   0.6445 ]      0: [PT ] crc-flash.xml.bin (size=131072/131072)
[   0.6448 ]      1: [TBC] nvtboot_cpu.bin.encrypt (size=65760/196608)
[   0.6451 ]      2: [RP1] kernel_fl2-cb03.dtb.encrypt (size=250656/1048576)
[   0.6453 ]      3: [EBT] cboot.bin.encrypt (size=484464/655360)
[   0.6457 ]      4: [WB0] warmboot.bin.encrypt (size=3952/131072)
[   0.6460 ]      5: [BPF] sc7entry-firmware.bin.encrypt (size=3376/262144)
[   0.6465 ] BFS0: 131072 @ 2560 SUM 1a38dd78 over 2883584 bytes
[   0.6469 ]    BFS:
[   0.6470 ]      0: [PT-1] crc-flash.xml.bin (size=131072/131072)
[   0.6473 ]      1: [TBC-1] nvtboot_cpu.bin.encrypt (size=65760/196608)
[   0.6476 ]      2: [RP1-1] kernel_fl2-cb03.dtb.encrypt (size=250656/1048576)
[   0.6478 ]      3: [EBT-1] cboot.bin.encrypt (size=484464/655360)
[   0.6479 ]      4: [WB0-1] warmboot.bin.encrypt (size=3952/131072)
[   0.6481 ]      5: [BPF-1] sc7entry-firmware.bin.encrypt (size=3376/262144)
[   0.6482 ]      8: [VER_b] emmc_bootblob_ver.txt (size=102/32768)
[   0.6484 ]      9: [VER] emmc_bootblob_ver.txt (size=102/32768)
[   0.6485 ] BFS1: 131072 @ 8704 SUM 1a38dd78 over 2981888 bytes
[   0.6487 ]    KFS:
[   0.6650 ]      0: [DTB] kernel_fl2-cb03.dtb.encrypt (size=250656/1048576)
[   0.6652 ]      1: [TOS] tos-mon-only.img.encrypt (size=54208/6291456)
[   0.6654 ]      2: [EKS] eks.img (size=1028/81920)
[   0.6655 ]      3: [LNX] boot.img.encrypt (size=11014144/67092480)
[   0.6734 ] KFS0: 1048576 @ 29376546 SUM 685b481d over 18436096 bytes
[   0.6775 ]    KFS:
[   0.6966 ]      0: [DTB-1] kernel_fl2-cb03.dtb.encrypt (size=250656/1048576)
[   0.6968 ]      1: [TOS-1] tos-mon-only.img.encrypt (size=54208/6291456)
[   0.6970 ]      2: [EKS-1] eks.img (size=1028/81920)
[   0.6972 ]      3: [LNX-1] boot.img.encrypt (size=11014144/67092480)
[   0.7054 ] KFS1: 1048576 @ 29522082 SUM 685b481d over 18436096 bytes
[   0.7095 ] 
[   0.7096 ] Boot Rom communication
[   0.7115 ] tegrarcm --chip 0x21 0 --rcm rcm_list_signed.xml
[   0.7127 ] BR_CID: 0x32101001643174420000000012058340
[   0.8295 ] RCM version 0X210001
[   0.9574 ] Boot Rom communication completed
[   1.9646 ] 
[   1.9646 ] Sending BCTs
[   1.9678 ] tegrarcm --download bct P3448_A00_lpddr4_204Mhz_P987.bct
[   1.9691 ] Applet version 00.01.0000
[   2.2105 ] Sending bct
[   2.2106 ] [................................................] 100%
[   2.2582 ] 
[   2.2611 ] tegrahost --chip 0x21 --align cboot.bin
[   2.2626 ] 
[   2.2652 ] tegrahost --magicid EBT --appendsigheader cboot.bin cboot.bin_blheader
[   2.2685 ] 
[   2.2711 ] tegrasign --key None --list cboot.bin_list.xml
[   2.2720 ] Assuming zero filled SBK key
[   2.2869 ] 
[   2.2889 ] tegrahost --updatesigheader cboot.bin_blheader.encrypt cboot.bin_blheader.hash zerosbk
[   2.2910 ] 
[   2.2938 ] tegrahost --chip 0x21 --align tegra210-p3448-0002-p3449-0000-b00.dtb
[   2.2945 ] 
[   2.2964 ] tegrahost --magicid DTB --appendsigheader tegra210-p3448-0002-p3449-0000-b00.dtb tegra210-p3448-0002-p3449-0000-b00.dtb_blheader
[   2.2987 ] 
[   2.3014 ] tegrasign --key None --list tegra210-p3448-0002-p3449-0000-b00.dtb_list.xml
[   2.3027 ] Assuming zero filled SBK key
[   2.3113 ] 
[   2.3132 ] tegrahost --updatesigheader tegra210-p3448-0002-p3449-0000-b00.dtb_blheader.encrypt tegra210-p3448-0002-p3449-0000-b00.dtb_blheader.hash zerosbk
[   2.3149 ] 
[   2.3152 ] Sending bootloader and pre-requisite binaries
[   2.3169 ] tegrarcm --download ebt cboot.bin.encrypt 0 0 --download rp1 tegra210-p3448-0002-p3449-0000-b00.dtb.encrypt 0
[   2.3181 ] Applet version 00.01.0000
[   2.5586 ] Sending ebt
[   2.6222 ] 
Error: Return value 1
Command tegrarcm --download ebt cboot.bin.encrypt 0 0 --download rp1 tegra210-p3448-0002-p3449-0000-b00.dtb.encrypt 0
Failed flashing t210ref.

By tracing the i2c0 we found that, the Tegra is accessing the addr 0x56 (which is to my knowledge not documented). We could workaround this issue by burning the board information (cvm.bin) from an board without eeprom to the page 0x56.

As this complicates our production, i would like to ask if there is any way to disable this undocumented access of the eeprom?

Best regards,
Johannes

hello johannes4422,

may I know what’s your flash commands since it’s a customized board.
did you apply Pinmux Changes to change the pinmux configuration applied by the software?

The flash command used is:

./flash.sh \
      -R $ROOTFS_DIR -K $OUT_DIR/kernel/zImage \
      -d $OUT_DIR/kernel/dtb/fl2-cb03.dtb \
     jetson-nano-fl2 mmcblk0p1
  • Linux_for_Tegra/Linux_for_Tegra/jetson-nano-fl2.conf:
EMMC_CFG=flash_l4t_t210_emmc_p3448.xml;
BLBlockSize=1048576;
source "${LDK_DIR}/p3448-0000.conf.common";
T21BINARGS="--bins \"EBT cboot.bin; "
CMDLINE_ADD="console=ttyS0,115200n8 console=tty0 fbcon=map:0 net.ifnames=0 sdhci_tegra.en_boot_part_access=1";

ROOTFSSIZE=14GiB;
VERFILENAME="emmc_bootblob_ver.txt";
OTA_BOOT_DEVICE="/dev/mmcblk0boot0";
OTA_GPT_DEVICE="/dev/mmcblk0boot1";
  • yes we have applied Pinmux Changes
    our pinmux.dtsi:
/*This dtsi file was generated by carrier_pcb_3.xlsm Revision: 1,01 */

#include <dt-bindings/pinctrl/pinctrl-tegra.h>

/ {
	pinmux: pinmux@700008d4 {
		status = "okay";
		pinctrl-names = "default", "drive", "unused";
		pinctrl-0 = <&pinmux_default>;
		pinctrl-1 = <&drive_default>;
		pinctrl-2 = <&pinmux_unused_lowpower>;

		pinmux_default: common {
			/* SFIO Pin Configuration */
			dvfs_pwm_pbb1 {
				nvidia,pins = "dvfs_pwm_pbb1";
				nvidia,function = "cldvfs";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			spi2_mosi_pb4 {
				nvidia,pins = "spi2_mosi_pb4";
				nvidia,function = "spi2";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			spi2_miso_pb5 {
				nvidia,pins = "spi2_miso_pb5";
				nvidia,function = "spi2";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			spi2_sck_pb6 {
				nvidia,pins = "spi2_sck_pb6";
				nvidia,function = "spi2";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			spi2_cs0_pb7 {
				nvidia,pins = "spi2_cs0_pb7";
				nvidia,function = "spi2";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			pe6 {
				nvidia,pins = "pe6";
				nvidia,function = "pwm2";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			pe7 {
				nvidia,pins = "pe7";
				nvidia,function = "pwm3";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			gen3_i2c_scl_pf0 {
				nvidia,pins = "gen3_i2c_scl_pf0";
				nvidia,function = "i2c3";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
			};

			gen3_i2c_sda_pf1 {
				nvidia,pins = "gen3_i2c_sda_pf1";
				nvidia,function = "i2c3";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
			};

			cam_i2c_scl_ps2 {
				nvidia,pins = "cam_i2c_scl_ps2";
				nvidia,function = "i2cvi";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
			};

			cam_i2c_sda_ps3 {
				nvidia,pins = "cam_i2c_sda_ps3";
				nvidia,function = "i2cvi";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
			};

			pex_l0_clkreq_n_pa1 {
				nvidia,pins = "pex_l0_clkreq_n_pa1";
				nvidia,function = "pe0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
			};

			pex_l0_rst_n_pa0 {
				nvidia,pins = "pex_l0_rst_n_pa0";
				nvidia,function = "pe0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
			};

			pex_l1_clkreq_n_pa4 {
				nvidia,pins = "pex_l1_clkreq_n_pa4";
				nvidia,function = "pe1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
			};

			pex_l1_rst_n_pa3 {
				nvidia,pins = "pex_l1_rst_n_pa3";
				nvidia,function = "pe1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
			};

			pex_wake_n_pa2 {
				nvidia,pins = "pex_wake_n_pa2";
				nvidia,function = "pe";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
			};

			sdmmc1_clk_pm0 {
				nvidia,pins = "sdmmc1_clk_pm0";
				nvidia,function = "sdmmc1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			sdmmc1_cmd_pm1 {
				nvidia,pins = "sdmmc1_cmd_pm1";
				nvidia,function = "sdmmc1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			sdmmc1_dat0_pm5 {
				nvidia,pins = "sdmmc1_dat0_pm5";
				nvidia,function = "sdmmc1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			sdmmc1_dat1_pm4 {
				nvidia,pins = "sdmmc1_dat1_pm4";
				nvidia,function = "sdmmc1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			sdmmc1_dat2_pm3 {
				nvidia,pins = "sdmmc1_dat2_pm3";
				nvidia,function = "sdmmc1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			sdmmc1_dat3_pm2 {
				nvidia,pins = "sdmmc1_dat3_pm2";
				nvidia,function = "sdmmc1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			sdmmc3_clk_pp0 {
				nvidia,pins = "sdmmc3_clk_pp0";
				nvidia,function = "sdmmc3";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			sdmmc3_cmd_pp1 {
				nvidia,pins = "sdmmc3_cmd_pp1";
				nvidia,function = "sdmmc3";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			sdmmc3_dat0_pp5 {
				nvidia,pins = "sdmmc3_dat0_pp5";
				nvidia,function = "sdmmc3";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			sdmmc3_dat1_pp4 {
				nvidia,pins = "sdmmc3_dat1_pp4";
				nvidia,function = "sdmmc3";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			sdmmc3_dat2_pp3 {
				nvidia,pins = "sdmmc3_dat2_pp3";
				nvidia,function = "sdmmc3";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			sdmmc3_dat3_pp2 {
				nvidia,pins = "sdmmc3_dat3_pp2";
				nvidia,function = "sdmmc3";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			shutdown {
				nvidia,pins = "shutdown";
				nvidia,function = "shutdown";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			lcd_bl_pwm_pv0 {
				nvidia,pins = "lcd_bl_pwm_pv0";
				nvidia,function = "pwm0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			lcd_gpio2_pv4 {
				nvidia,pins = "lcd_gpio2_pv4";
				nvidia,function = "pwm1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			pwr_i2c_scl_py3 {
				nvidia,pins = "pwr_i2c_scl_py3";
				nvidia,function = "i2cpmu";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
			};

			pwr_i2c_sda_py4 {
				nvidia,pins = "pwr_i2c_sda_py4";
				nvidia,function = "i2cpmu";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
			};

			clk_32k_in {
				nvidia,pins = "clk_32k_in";
				nvidia,function = "clk";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			clk_32k_out_py5 {
				nvidia,pins = "clk_32k_out_py5";
				nvidia,function = "soc";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			pz1 {
				nvidia,pins = "pz1";
				nvidia,function = "sdmmc1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			pz5 {
				nvidia,pins = "pz5";
				nvidia,function = "soc";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			core_pwr_req {
				nvidia,pins = "core_pwr_req";
				nvidia,function = "core";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			pwr_int_n {
				nvidia,pins = "pwr_int_n";
				nvidia,function = "pmi";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			dap4_dout_pj6 {
				nvidia,pins = "dap4_dout_pj6";
				nvidia,function = "i2s4b";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			dap4_fs_pj4 {
				nvidia,pins = "dap4_fs_pj4";
				nvidia,function = "i2s4b";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			dap4_sclk_pj7 {
				nvidia,pins = "dap4_sclk_pj7";
				nvidia,function = "i2s4b";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			gen1_i2c_scl_pj1 {
				nvidia,pins = "gen1_i2c_scl_pj1";
				nvidia,function = "i2c1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
			};

			gen1_i2c_sda_pj0 {
				nvidia,pins = "gen1_i2c_sda_pj0";
				nvidia,function = "i2c1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
			};

			gen2_i2c_scl_pj2 {
				nvidia,pins = "gen2_i2c_scl_pj2";
				nvidia,function = "i2c2";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
			};

			gen2_i2c_sda_pj3 {
				nvidia,pins = "gen2_i2c_sda_pj3";
				nvidia,function = "i2c2";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
			};

			uart1_tx_pu0 {
				nvidia,pins = "uart1_tx_pu0";
				nvidia,function = "uarta";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			uart1_rx_pu1 {
				nvidia,pins = "uart1_rx_pu1";
				nvidia,function = "uarta";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			jtag_rtck {
				nvidia,pins = "jtag_rtck";
				nvidia,function = "jtag";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			uart4_tx_pi4 {
				nvidia,pins = "uart4_tx_pi4";
				nvidia,function = "uartd";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			uart4_rx_pi5 {
				nvidia,pins = "uart4_rx_pi5";
				nvidia,function = "uartd";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			uart4_rts_pi6 {
				nvidia,pins = "uart4_rts_pi6";
				nvidia,function = "uartd";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			uart4_cts_pi7 {
				nvidia,pins = "uart4_cts_pi7";
				nvidia,function = "uartd";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			qspi_io0_pee2 {
				nvidia,pins = "qspi_io0_pee2";
				nvidia,function = "qspi";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			qspi_io1_pee3 {
				nvidia,pins = "qspi_io1_pee3";
				nvidia,function = "qspi";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			qspi_sck_pee0 {
				nvidia,pins = "qspi_sck_pee0";
				nvidia,function = "qspi";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			qspi_cs_n_pee1 {
				nvidia,pins = "qspi_cs_n_pee1";
				nvidia,function = "qspi";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			qspi_io2_pee4 {
				nvidia,pins = "qspi_io2_pee4";
				nvidia,function = "qspi";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			qspi_io3_pee5 {
				nvidia,pins = "qspi_io3_pee5";
				nvidia,function = "qspi";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			dap2_din_paa2 {
				nvidia,pins = "dap2_din_paa2";
				nvidia,function = "i2s2";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			dap2_dout_paa3 {
				nvidia,pins = "dap2_dout_paa3";
				nvidia,function = "i2s2";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			dap2_fs_paa0 {
				nvidia,pins = "dap2_fs_paa0";
				nvidia,function = "i2s2";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			dap2_sclk_paa1 {
				nvidia,pins = "dap2_sclk_paa1";
				nvidia,function = "i2s2";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			/* GPIO Pin Configuration */
			aud_mclk_pbb0 {
				nvidia,pins = "aud_mclk_pbb0";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			dmic1_clk_pe0 {
				nvidia,pins = "dmic1_clk_pe0";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			dmic1_dat_pe1 {
				nvidia,pins = "dmic1_dat_pe1";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			dmic2_clk_pe2 {
				nvidia,pins = "dmic2_clk_pe2";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			dmic2_dat_pe3 {
				nvidia,pins = "dmic2_dat_pe3";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			cam1_mclk_ps0 {
				nvidia,pins = "cam1_mclk_ps0";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			cam2_mclk_ps1 {
				nvidia,pins = "cam2_mclk_ps1";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			cam_af_en_ps5 {
				nvidia,pins = "cam_af_en_ps5";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			cam1_pwdn_ps7 {
				nvidia,pins = "cam1_pwdn_ps7";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			cam2_pwdn_pt0 {
				nvidia,pins = "cam2_pwdn_pt0";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			sata_led_active_pa5 {
				nvidia,pins = "sata_led_active_pa5";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			pa6 {
				nvidia,pins = "pa6";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			als_prox_int_px3 {
				nvidia,pins = "als_prox_int_px3";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			temp_alert_px4 {
				nvidia,pins = "temp_alert_px4";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			button_power_on_px5 {
				nvidia,pins = "button_power_on_px5";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			button_vol_up_px6 {
				nvidia,pins = "button_vol_up_px6";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			button_home_py1 {
				nvidia,pins = "button_home_py1";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			lcd_te_py2 {
				nvidia,pins = "lcd_te_py2";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			lcd_bl_en_pv1 {
				nvidia,pins = "lcd_bl_en_pv1";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			pz0 {
				nvidia,pins = "pz0";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			pz2 {
				nvidia,pins = "pz2";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			pz3 {
				nvidia,pins = "pz3";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			dap4_din_pj5 {
				nvidia,pins = "dap4_din_pj5";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			uart2_tx_pg0 {
				nvidia,pins = "uart2_tx_pg0";
				nvidia,function = "uartb";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			uart2_rx_pg1 {
				nvidia,pins = "uart2_rx_pg1";
				nvidia,function = "uartb";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			uart2_rts_pg2 {
				nvidia,pins = "uart2_rts_pg2";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			uart2_cts_pg3 {
				nvidia,pins = "uart2_cts_pg3";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			spi1_mosi_pc0 {
				nvidia,pins = "spi1_mosi_pc0";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			spi1_sck_pc2 {
				nvidia,pins = "spi1_sck_pc2";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			spi1_cs0_pc3 {
				nvidia,pins = "spi1_cs0_pc3";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			spi1_cs1_pc4 {
				nvidia,pins = "spi1_cs1_pc4";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			uart3_tx_pd1 {
				nvidia,pins = "uart3_tx_pd1";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			uart3_rx_pd2 {
				nvidia,pins = "uart3_rx_pd2";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			uart3_cts_pd4 {
				nvidia,pins = "uart3_cts_pd4";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			wifi_en_ph0 {
				nvidia,pins = "wifi_en_ph0";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			wifi_wake_ap_ph2 {
				nvidia,pins = "wifi_wake_ap_ph2";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			ap_wake_bt_ph3 {
				nvidia,pins = "ap_wake_bt_ph3";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			bt_rst_ph4 {
				nvidia,pins = "bt_rst_ph4";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			bt_wake_ap_ph5 {
				nvidia,pins = "bt_wake_ap_ph5";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			ph6 {
				nvidia,pins = "ph6";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			ap_wake_nfc_ph7 {
				nvidia,pins = "ap_wake_nfc_ph7";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			nfc_en_pi0 {
				nvidia,pins = "nfc_en_pi0";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			nfc_int_pi1 {
				nvidia,pins = "nfc_int_pi1";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			gps_en_pi2 {
				nvidia,pins = "gps_en_pi2";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			pcc7 {
				nvidia,pins = "pcc7";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
			};

			usb_vbus_en0_pcc4 {
				nvidia,pins = "usb_vbus_en0_pcc4";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
			};

			dp_hpd0_pcc6 {
				nvidia,pins = "dp_hpd0_pcc6";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			hdmi_int_dp_hpd_pcc1 {
				nvidia,pins = "hdmi_int_dp_hpd_pcc1";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
			};

			hdmi_cec_pcc0 {
				nvidia,pins = "hdmi_cec_pcc0";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
			};
		};

		pinmux_unused_lowpower: unused_lowpower {
			dvfs_clk_pbb2 {
				nvidia,pins = "dvfs_clk_pbb2";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			gpio_x1_aud_pbb3 {
				nvidia,pins = "gpio_x1_aud_pbb3";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			gpio_x3_aud_pbb4 {
				nvidia,pins = "gpio_x3_aud_pbb4";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			dap1_din_pb1 {
				nvidia,pins = "dap1_din_pb1";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			dap1_dout_pb2 {
				nvidia,pins = "dap1_dout_pb2";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			dap1_fs_pb0 {
				nvidia,pins = "dap1_fs_pb0";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			dap1_sclk_pb3 {
				nvidia,pins = "dap1_sclk_pb3";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			spi2_cs1_pdd0 {
				nvidia,pins = "spi2_cs1_pdd0";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			dmic3_clk_pe4 {
				nvidia,pins = "dmic3_clk_pe4";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			dmic3_dat_pe5 {
				nvidia,pins = "dmic3_dat_pe5";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			cam_rst_ps4 {
				nvidia,pins = "cam_rst_ps4";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			cam_flash_en_ps6 {
				nvidia,pins = "cam_flash_en_ps6";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			cam1_strobe_pt1 {
				nvidia,pins = "cam1_strobe_pt1";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			motion_int_px2 {
				nvidia,pins = "motion_int_px2";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			touch_rst_pv6 {
				nvidia,pins = "touch_rst_pv6";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			touch_clk_pv7 {
				nvidia,pins = "touch_clk_pv7";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			touch_int_px1 {
				nvidia,pins = "touch_int_px1";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			modem_wake_ap_px0 {
				nvidia,pins = "modem_wake_ap_px0";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			button_vol_down_px7 {
				nvidia,pins = "button_vol_down_px7";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			button_slide_sw_py0 {
				nvidia,pins = "button_slide_sw_py0";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			lcd_rst_pv2 {
				nvidia,pins = "lcd_rst_pv2";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			lcd_gpio1_pv3 {
				nvidia,pins = "lcd_gpio1_pv3";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			ap_ready_pv5 {
				nvidia,pins = "ap_ready_pv5";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			pz4 {
				nvidia,pins = "pz4";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			clk_req {
				nvidia,pins = "clk_req";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			cpu_pwr_req {
				nvidia,pins = "cpu_pwr_req";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			uart1_rts_pu2 {
				nvidia,pins = "uart1_rts_pu2";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			uart1_cts_pu3 {
				nvidia,pins = "uart1_cts_pu3";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			pk0 {
				nvidia,pins = "pk0";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			pk1 {
				nvidia,pins = "pk1";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			pk2 {
				nvidia,pins = "pk2";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			pk3 {
				nvidia,pins = "pk3";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			pk4 {
				nvidia,pins = "pk4";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			pk5 {
				nvidia,pins = "pk5";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			pk6 {
				nvidia,pins = "pk6";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			pk7 {
				nvidia,pins = "pk7";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			pl0 {
				nvidia,pins = "pl0";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			pl1 {
				nvidia,pins = "pl1";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			spi1_miso_pc1 {
				nvidia,pins = "spi1_miso_pc1";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			spi4_mosi_pc7 {
				nvidia,pins = "spi4_mosi_pc7";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			spi4_miso_pd0 {
				nvidia,pins = "spi4_miso_pd0";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			spi4_sck_pc5 {
				nvidia,pins = "spi4_sck_pc5";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			spi4_cs0_pc6 {
				nvidia,pins = "spi4_cs0_pc6";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			uart3_rts_pd3 {
				nvidia,pins = "uart3_rts_pd3";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			wifi_rst_ph1 {
				nvidia,pins = "wifi_rst_ph1";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			gps_rst_pi3 {
				nvidia,pins = "gps_rst_pi3";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			spdif_out_pcc2 {
				nvidia,pins = "spdif_out_pcc2";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			spdif_in_pcc3 {
				nvidia,pins = "spdif_in_pcc3";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			usb_vbus_en1_pcc5 {
				nvidia,pins = "usb_vbus_en1_pcc5";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
			};
		};

		drive_default: drive {
		};
	};
};	

Do you have any hints on how to suppress this i2c0 accesses?

Best regards,
Johannes

please check this thread for reference, Topic 126687.

Hi,

Thanks for the link, but i think this is not related to my specific issue.

The devkit has an eeprom on the second i2c bus at addr 0x50. For that reason we connected our carrier-board eeprom to the first i2c-bus, so that it doesn’t interferes with the dev-kit layout.
But as i shown by the i2c trace there is an undocumented access of the SOM (before the cboot-bootloader) to addr 0x56 at i2c0.

We want to avoid having to redesign our carrier-board or to flash the board information to the eeprom at addr 0x56. Do you see any way for that?

Hi,

If I remember correctly, 0x56 is the carrier board eeprom and it is not mandatory.

Sorry in advance if this is discussed somewhere here. I just don’t get why shall we care about this eeprom.

Hi,

According to the Jetson Nano Product Design Guide:

3.4 Features Not to be Implemented
The Jetson Nano Developer Kit carrier board features that should not be copied as they are not required or useful for a custom carrier board design. The ID EEPROM (P3449 - U11) is a feature that is used for NVIDIA internal purposes, but not useful on a custom design. A similar function may be desired for a custom design, but the NVIDIA software will not interact with these devices and the I2C address used by the developer kit carrier board ID EEPROM on the I2C2 interface (7’h57) should be avoided.

We followed these instructions and placed our custom eeprom at i2c-bus 0 - finding out that there is an undocumented eeprom access which prevents the device from flashing and booting.
Probably you can’t do anything about it, but NVidia should at least include this information in the next revision of the product design guide.

regards,
Johannes

hello johannes4422,

please check the board configuration file, i.e. p3448-0000.conf.common.
there’s process_board_version() for reading the board id and board version from EEPROM, you may have a try to disable this, and specify the board info to flash command-line for testing.
for example, $ sudo BOARDID=3448 BOARDSKU=0002 FAB=400 ./flash.sh ... jetson-nano-devkit-emmc mmcblk0p1

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