GPIO Pinmux

I want to change the functionality of a pin on the TX2 to be a GPIO. I’ve looked for the TX2 pinmux spreadsheet on the download page but I don’t see it.

I was also looking in the ‘Linux_for_Tegra/sources/hardware’ directory for a pinmux dtsi file but I don’t see that either.

How do I configure a pin to be a GPIO?

If need be I can rebuild u-boot

Thanks for any help,

Dave

Hi cospan,

We will have the TX2 pinmux file published once it’s ready, please stay tuned.

Thanks

That’s great to hear, I’m looking forward to it.

I’m also waiting for a Pinmux spreadsheet

Is there a time expectation on the release of the pinmux sheet and the full TRM?

The Jetson TX2 Module Pinmux was posted at 5/1, please download it from below link:
http://developer.nvidia.com/embedded/dlc/jetson-tx2-module-pinmux

Thanks

Hi,
I’m looking at the TX2 pinmux sheet as posted 5/1.
Want to set pin locations E16 and D16 ( AO_DMIC_IN_CLK and DAT), to GPIOs like you can on the TX1. However the drop down options only list DMIC3 or DMIC5 options.

An error or not possible for the TX2 ??

If I edit column G to include a reference to GPIO3_PAA_00 and 01 which look likely to be the missing entries the drop down updates with the correct options.

Ok to do this and still get a valid dtsi file?

Thanks

@RichT

Hi,

The DTSI doesn’t list all the GPIOs explicitly but you can get the name from Column V which is what you have pointed out.

Just to let you know, I’m not an expert, but I have been able to use GPIOs from userland using the following method:

1. Go into the spreadsheet and find the GPIO Port and offset from Column V

As an example:

Line 189 in the spreadsheet looks like this:

(Column of interest) Name

(A) A0_DMIC_IN_DAT... (J) DMIC5_DAT... (V) can_gpio0_paa0

The last section of the name in column ‘V’ is ‘PAA0’, this is the GPIO Port and offset

Set Column ‘AQ’ as ‘unused’

2. Generate the outputted GPIO pinmux dtsi and add it to your DTS configuration

3. If the peripheral that is using that GPIO is enabled you should disable it

I just looked up dmic5 within the address table of the TX2 TRM and it’s on the AON processor at address 0x0C330000. After grepping around the ‘hardware’ source directory it doesn’t look like it’s enabled so you shouldn’t need to disable it. If, for example, it was dmic1 then you would need to add a block inside your base DTS file that would disable it like this:

dmic@290400 {
 status = "disabled"; 
};

4. Hog out your GPIO

You will need to know if you are using the GPIO from the main processor or from the AON processor. You can find out which port goes on which processor by looking in the file:

Linux_for_Tegra/sources/kernel/kernel-4.4/include/dt-bindings/gpio/tegra186-gpio.h

but to simplify your life here is the mapping (I’ll reference the numbers down below):

[b]
Main Processor:

A = 0
B = 1
C = 2
D = 3
E = 4
F = 5
G = 6
H = 7
I = 8
J = 9
K = 10
L = 11
M = 12
N = 13
O = 14
P = 15
Q = 16
R = 17
T = 18
X = 19
Y = 20
BB = 21
CC = 22
DD = 23

AON:

S = 0
U = 1
V = 2
W = 3
Z = 4
AA = 5
EE = 6
FF = 7
[/b]

Since the Port for DMIC5 is ‘AA’ then it’s on the AON processor and the hog out will be for the GPIO controller on the AON processor.

For reference here are the addresses for the GPIO controller on the main processor and the AON processor (found within the TRM).

Main GPIO Controller: 0x02200000
AON GPIO Controller:  0x0C2F0000

I’ll just show how to do it for both of the controllers:

Hogging out for the main processor:

This is for GPIO M1

gpio@2200000 {
  my_gpio_name {
    gpio-hog; //Take over a pin
    status = "okay";
    input; //This can be 'input', 'output-low' or 'output-high'
    gpios = <TEGRA_MAIN_GPIO(M, 1) 0>;
    label = "my_gpio";
  };
};

This is for GPIO AA0

gpio@c2f0000 {
  my_aon_gpio_name {
    gpio-hog;
    status = "okay";
    output-low;
    gpios = <TEGRA_AON_GPIO(AA, 0) 0>;
    label = "my_aon_gpio";
  };
};

Thanks @akmal.ali for catching that error

5. Find your GPIO number that you will let you access it within userland.

(This was taken from this thread: https://devtalk.nvidia.com/default/topic/1003613/?comment=5143299)

In order to access your GPIO device you need to get your GPIO number. To do this:

  1. Find the processor base value:
  • Main Processor base value is: 320
  • AON Processor base value is: 256
  1. From the port listing above find the index of your port.

As an example AA would be: 5

  1. Get the offset from your port, which is the number after your port.

AA0 -> Offset 0

  1. Use the following formula to to calculate the userland GPIO:

+ <8 * Port Index> + Offset

256 + 8 * 5 + 0 = 296

This is value you should put into /sys/class/gpio/export

Finally, you can check your work by searching ‘hog’ in a dump of dmesg. The kernel will tell you what the GPIO number is while it boots.

Just to reiterate, I have gotten these to work but I’m not sure if there is a better way. If there is a mistake please let me know.

Dave

Many thanks for that info Dave, I’ll give it a try.

cospan thanks~

@cospan

Thanks. I have found this to work. :)

Though I did have to change gpio@C2F0000 {
to gpio@c2f0000 {
i.e. Non capitalised.

@JerryChang

I am using several GPIO pins on the TX1/TX2 to program an FPGA. I toggle the GPIOs by using mmap on /dev/mem and write to relevant registers to change input/output and values.

On the TX1, I can toggle the pins such that I can program my FPGA in ~6 seconds. The time taken relates directly to the CPU frequency ( I have only a single core turned on when programming the FPGA).

However on the TX2 the same process works, but is much much slower. The time taken is now ~ 120 seconds. The time taken also doesn’t vary much with the cpu frequency. I find that toggling GPIO pins on the TX2 is much slower.

I’d appreciate any help on figuring out why the TX2 is so much slower using this method?

Akmal

Hi,

I am traing to read the GPIO pins GPIO18_MDM_COLDBOOT and GPIO17_MDM2AP_READY, I am able to read these GPIOs using a TX1 board but I am not able to read one of these GPIOs using TX2 board

This is the GPIO information

Pin name             GPIO Name      GPIO#           
GPIO18_MDM_COLDBOOT  GPIO3_PI.06    390
GPIO17_MDM2AP_READY  GPIO3_PI.07    391

After to configure the GPIO the kernel debug information returns this information:

cat /sys/kernel/debug/gpio
GPIOs 248-255, platform/max77620-gpio, max77620-gpio, can sleep:
 gpio-248 (                    |external-connection:) in  hi    
 gpio-253 (                    |spmic_gpio_input_5  ) in  hi    
 gpio-254 (                    |spmic_gpio_input_6  ) in  hi    

GPIOs 256-319, platform/c2f0000.gpio, tegra-gpio-aon:
 gpio-272 (                    |temp_alert          ) in  hi    
 gpio-312 (                    |Power               ) in  hi    
 gpio-313 (                    |Volume Up           ) in  hi    
 gpio-314 (                    |Volume Down         ) in  hi    
 gpio-315 (                    |wifi-wake-ap        ) in  lo    

GPIOs 320-511, platform/2200000.gpio, tegra-gpio:
 gpio-390 (                    |sysfs               ) in  hi    
 gpio-391 (                    |sysfs               ) in  lo    
 gpio-412 (                    |vdd-usb0-5v         ) out lo    
 gpio-413 (                    |vdd-usb1-5v         ) out lo    
 gpio-420 (                    |eqos_phy_reset      ) out hi    
 gpio-421 (                    |eqos_phy_intr       ) in  hi    
 gpio-424 (                    |wifi-enable         ) out hi    
 gpio-441 (                    |hdmi2.0_hpd         ) in  lo    
 gpio-444 (                    |wp                  ) in  lo    
 gpio-445 (                    |cd                  ) in  lo    
 gpio-446 (                    |en-vdd-sd           ) out hi    
 gpio-479 (                    |external-connection:) in  hi

But when I read the GPIO 391 the value is always the same, since I am able to read this GPIO using TX1 board, I think is not a hardware problem.

How I can check if the GPIO is already working as a GPIO? Because the pin has a second function called MDM2AP_READY. I am wondering if by default this pin is not configured as GPIO.

Thanks.

I was wondering why the gpio-numbers that are assigned during boot (listed in dmesg) do not follow the calculation based on port# and index?

For example:
PI.04 - calculated 388 - assigned 324
PAA.02 - calculated 298 - assigned 490

324 is working
490 is not working.

@cospan

I tried to follow your excellent explanation with the pin GPIO9_MOTION_INT = GPIO3_PAA.02.
The pin shows up during boot as hogged, but I cannot access it. This is an AON pin. Other pins on the main processor work in the way you described. Is there anything special with the PAA.02?

Thanks!

Looking into the Jetson-TX2-Generic-Customer-Pinmux-Template.xlsm on line 219:
GPIO9_MOTION_INT on Pin G14 is marked “SFIO”, although I cannot recognize any SFIO function for this pin.
Is the designation “SFIO” wrong or did I miss out on something?

@ManuelLeiva

I’m having this same exact problem. How did you solve it?

Hi @jfernandez,

The problem was solved configuring a Pull up for the GPIO3_PI.07

+                       gpio_pq7_pi7 {
+                               nvidia,pins = "gpio_pq7_pi7";
+                               nvidia,function = "rsvd0";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               status = "okay";
+                       };

Regards.