Hardware design related question based on Jetson TX2

Robotics & Edge Computing Jetson & Embedded Systems Jetson TX2
1

Hi,

I am designing a system based on Jeston TX2/TX2i module. I am using a PCIe switch to connect to four mini PCIe cards. I am using PCIe0 root port on TX2 to connect to the PCIe switch. The downports (all x1) from the switch is connected to four miniPCIe cards. I am also using a clock buffer which takes the reference clocks from Jetson module as input and outputs clocks to each of the minPCIe cards based on the clkreq# signal from each of these mini PCIe cards. I am not sure about the status of PEX0_CLKREQ# pin on the TX2 module. Can i leave it NC in this scenario?

Regards
Goutam

2

Hi, there is no CLKREQ pin on switch? Then how to inform host to output clock when needed?

3

In this case, Can i connect the PEX0_CLKREQ# pin to ground permanently so that clock from host is always enabled. Clock buffer can make a decision to output clock to individual mini PCIe cards based on clock request from each miniPCIe cards?

Regards
Goutam

4

That is not validated and so not be suggested. Better to use a signal to do this.