Hot wo configure GPIO9 (Pin 211) for alternate function of Audio primary clock and drive it at 38.4MHz

Autonomous Machines Jetson & Embedded Systems Jetson Orin NX
,
1

Hi,
I want to drive 38.4MHz clock on Audio Primary clock pin (211 - Default function GPIO 09 on 40 pin header) .
How can I achieve that?
Thanks,
Pradeep

3

Hi Pradeego,

Are you using the devkit or custom board for Orin NX?
What’s your Jetpack version in use?

4

Hi Kevin,
Yes, I am using Jetson Orin Nano Dev kit with Orin Nx module on it which has 40 pin header.
Jet pack version is: 5.1.2
Release 35.4
GPIO09 (Pin 7 on 40 pin header) is assigned an alternate function of Primary Audio Clock.
How can I configure it to drive 38.4MHz.

5

Have you used Jetson-IO to enable aud on the devkit as following?

image
image800×757 14.1 KB

$ sudo /opt/nvidia/jetson-io/jetson-io.py
6

Yes, I tried that.
With that change I see the pin configured as clock output but the output frequency is 45MHz.

7

Please verify if the following steps worked for your case.

Step 1. Decompile /boot/XXXX-custom.dtb and remove the following line

tegra_sound: sound {
                compatible = "nvidia,tegra186-ape";
                ...
-               nvidia-audio-card,mclk-fs = <256>;
                status = "okay";
        };
}

Step 2. Configure pll_a1 clock rate
# cd /sys/kernel/debug/bpmp/debug/clk/pll_a1
# echo 0 > state
# cat state
# echo 576000000 > rate
# echo 1 > state
# cat rate

Step 3. Configure plla1_out1
# cd /sys/kernel/debug/bpmp/debug/clk/plla1_out1
# echo 38400000 > rate
# cat rate

Step 4. Configure aud_mclk to use plla1_out1 as parent clock source
# cd /sys/kernel/debug/bpmp/debug/clk/aud_mclk
# echo plla1_out1 > parent
# echo 0 > state
# cat rate
# echo 38400000 > rate
# cat rate
# echo 1 > state
# cat rate
1 Like
8

Step1. I dont see an entry for nvidia-audio-card,mclk-fs = <256>; in sounds {}
Here is what I see

                iommus = <0x06 0x02>;
                iommu-resv-regions = <0x00 0x00 0x00 0x40000000 0x00 0x60000000 0xffffffff 0xffffffff>;
                status = "okay";
                compatible = "nvidia,tegra186-ape";
                nvidia-audio-card,name = "NVIDIA Jetson Orin NX APE";
                clocks = <0x02 0x5d 0x02 0x68 0x02 0x07>;
                clock-names = "pll_a\0pll_a_out0\0extern1";
                assigned-clocks = <0x02 0x68 0x02 0x07>;
                assigned-clock-parents = <0x02 0x5d 0x02 0x68>;
                phandle = <0x326>;

kernel_tegra234-p3767-0000-p3768-0000-a0-user-custom.dtb.txt (339.4 KB)
kernel_tegra234-p3767-0000-p3768-0000-a0-user-custom.dts.txt (432.7 KB)

After following step 2 and 3, I see a frequency of 36000000.

root@ubuntu:/sys/kernel/debug/bpmp/debug/clk/pll_a1# cd /sys/kernel/debug/bpmp/debug/clk/pll_a1
root@ubuntu:/sys/kernel/debug/bpmp/debug/clk/pll_a1# echo 0 > state
root@ubuntu:/sys/kernel/debug/bpmp/debug/clk/pll_a1# cat state
1
root@ubuntu:/sys/kernel/debug/bpmp/debug/clk/pll_a1# echo 576000000 > rate
root@ubuntu:/sys/kernel/debug/bpmp/debug/clk/pll_a1# echo 1 > state
root@ubuntu:/sys/kernel/debug/bpmp/debug/clk/pll_a1# cat rate
576000000
root@ubuntu:/sys/kernel/debug/bpmp/debug/clk/pll_a1#
root@ubuntu:/sys/kernel/debug/bpmp/debug/clk/pll_a1#
root@ubuntu:/sys/kernel/debug/bpmp/debug/clk/pll_a1# cd /sys/kernel/debug/bpmp/debug/clk/aud_mclk/
root@ubuntu:/sys/kernel/debug/bpmp/debug/clk/aud_mclk# echo plla1_out1 > parent
root@ubuntu:/sys/kernel/debug/bpmp/debug/clk/aud_mclk# cat rate
48000000
root@ubuntu:/sys/kernel/debug/bpmp/debug/clk/aud_mclk# echo 38400000 > rate
root@ubuntu:/sys/kernel/debug/bpmp/debug/clk/aud_mclk# cat rate
36000000
9

Could you help to check if this line is in /boot/dtb/kernel_XXX.dtb on your board?

Please refer to the Step 3 and Step 4 again and verify, I’ve modified few commands.

10

Yes, I can see 38.4MHz on the pin with the changes you provided. Thank you!
Where can I find the documentation for these PLL configurations for audio clock? I searched in Technical reference manual for Orin modules and couldn’t find it.

12

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