How can I use the SPE & CAN and Where I get the SCR info?

[muonkmu]

Our team is currently developing a Robot system using the ORIN AGX Devkit. We aim to implement the SPE function that processes SPI and CAN messages. However, Nvidia does not provide specific support for the SPE reference code for ORIN AGX.

To proceed with the implementation, we have analyzed the SPE demo code for Xavier AGX and referred to the documentation available at Jetson Sensor Processing Engine (SPE) Developer Guide: Welcome.

We have successfully completed the CAN Bus disabling and Pinmux setup in Linux using Jetson-IO and device tree overlay.

However, we encountered difficulties in setting up the SCR (System Control Register) for ORIN AGX. Currently, we are unable to find relevant information about ORIN SCR and how to configure it. The information that was previously available in the TRM (Technical Reference Manual) seems to have been removed or not easily accessible. Additionally, the SCR folder (hardware/nvidia/platform/t23x/common/bct/scr) does not exist in the Kernel source.

We would appreciate any guidance on determining the appropriate SCR values required to achieve this task.

Furthermore, we are uncertain whether building the old code for Xavier and flashing it onto ORIN would enable normal CAN operation on the SPE. We would greatly appreciate any insights or advice regarding this matter.

Thank you for your support.

[jachen]

Hello,
Please take a look at Jetson Linux 35.3.1 | NVIDIA Developer, Sensor Processing Engine Sources
Jetson AGX Orin support is in.
Anyway, it only has SPI sample code.
CAN is not supported yet.

br
ChenJian

[muonkmu]

Thank to your reply.

1. Does Nvidia have a plan to support SPE & CAN in ORIN AGX?
2. Where I can get ORIN SCR information like mean of register, how to config ?

[jachen]

Hello,
I get no information about SPE/CAN support in Orin AGX in recent release. Anyway, I think you should be able to add such code (CAN) by yourself, referring the former sample code in SPE source package of rel-32. The logic should be similar.
There’s no public Orin SCR information.

If you decide to support CAN in SPE firmware by yourself, you can start a new thread, and I can provide necessary support if you get any problem.
Just keep in mind that the CAN module used should be in AON cluster, and pins should be exported. I think CAN0 and CAN1 can be used.
For SCR, you can make similar changes, as SPI shows:
reg@2125 { /* CLK_RST_CONTROLLER_AON_SCR_CAN_0 */
exclusion-info = <3>;
value = <0x30001410>;
};

br
ChenJian

[muonkmu]

Thank you.
I will make new thread if I develop the SPE & CAN system.