How to enable PCIe x2 slot with Xavier?

On the X200 carrier board for the Xavier we have exposed all 5 PCIe slots. All seem to work fine, except the x2 slot, which is not used at all in the dev kit.

I assume that this PCIe port needs to be configured in the device tree. Please provide the info how to do this. The PCIe x2 slot uses the following resources:

  • UPHY_RX8 and UPHY_RX9
  • UPHY_TX8 and UPHY_TX9
  • PEX_CLK4 (pads E22 and E23)

Is X200 a custom carrier board? (not designed by Nvidia)? Because, in standard Jetson-Xavier board, there is no slot that corresponds to these lanes.
In any case, this slot can be enabled by enabling PCIe C4 controller. Please use the following patch

diff --git a/common/tegra194-p2888-0000-a00.dtsi b/common/tegra194-p2888-0000-a00.dtsi
index 6bbb03320b47..c75d3872f540 100644
--- a/common/tegra194-p2888-0000-a00.dtsi
+++ b/common/tegra194-p2888-0000-a00.dtsi
@@ -130,6 +130,18 @@
                phy-names = "pcie-p2u-0";

+       pcie@14160000 {
+               status = "okay";
+               vddio-pex-ctl-supply = <&p2888_spmic_sd3>;
+               nvidia,disable-aspm-states = <0xf>;
+               nvidia,enable-power-down;
+               phys = <&p2u_8>,
+                      <&p2u_9>;
+               phy-names = "pcie-p2u-0", "pcie-p2u-1";
+       };
        pcie@141a0000 {
                status = "disabled";

Thank you for this info. We changed the device tree and the x2 PCIe slot is now working.

The X200 is our ( first carrier board of the AGX Xavier. It features 5 PCIe slots:

  • PCIe x8
  • PCIe x4
  • PCIe x2
  • 2x PCIe x1

So all PCIe busses of the AGAX Xavier are available on PCIe slots. So 5 PCIe cards may be plugged in at the same time. We plan to ship first boards soon.

Thanks for the pics.
Its good to know

It’s really nice board!

Hi vidyas

i try your patch in xavier developer board.

i know in developer board didn’t have this interface but i think the system need create and check it.

after i update the image and dtb i can’t see this pcie

nvidia@jetson-0424418058605:~$ dmesg | grep "Adding device"
[    0.962174] iommu: Adding device 14180000.pcie to group 0
[    0.963499] iommu: Adding device 14100000.pcie to group 1
[    0.964573] iommu: Adding device 14140000.pcie to group 2
[    0.965580] iommu: Adding device 141a0000.pcie to group 3

i can’t see 14160000 pcie

Hi dude & vidyas

i have a carried board so i test in xavier mother board and carried board.

but i can’t see 14160000 pcie in two boards.
i use kernel R31.1


the 2 lanes PCIe bus is not used on the dev kit board. Therefore the device tree must be extended to enable this PCIe bus:

enable 5th pci slot:
in tegra_194-p2888-0000-a00.dtsi

pcie@14160000 {
status = “okay”;

	vddio-pex-ctl-supply = <&p2888_spmic_sd3>;
	nvidia,disable-aspm-states = <0xf>;

	phys = <&p2u_8>,
	phy-names = "pcie-p2u-0", "pcie-p2u-1";

Please let me know, if this works for you. We are in the process of releasing the manual for the X200. It will be decribed in there as well.

Best regards, Jurgen

Hi, Did you try to run all PCIe slots at the same time?

if yes any issue poped up?


@etta, can you please check if you have updated the device-tree file properly (it would be better if you can do a full flash to see if there is something wrong with updating only DT). Since it worked for Auvidea, I don’t see any reason why it wouldn’t work for you.
Also, you can go inside “/proc/device-tree/pcie@14160000” folder on target and check status (i.e. cat status) to see if it is ‘okay’ or ‘disabled’.