On the X200 carrier board for the Xavier we have exposed all 5 PCIe slots. All seem to work fine, except the x2 slot, which is not used at all in the dev kit.
I assume that this PCIe port needs to be configured in the device tree. Please provide the info how to do this. The PCIe x2 slot uses the following resources:
- UPHY_RX8 and UPHY_RX9
- UPHY_TX8 and UPHY_TX9
- PEX_CLK4 (pads E22 and E23)