How to make a fixed output format UYVY MIPI CSI-2 camera to work in xavier?

Autonomous Machines Jetson & Embedded Systems Jetson AGX Xavier
1

How to make a fixed output format UYVY MIPI CSI-2 camera to work in xavier?

2

v4l2-ctl --set-fmt-video=width=1920,height=1080,pixelformat=UYVY --stream-mmap --stream-count=100 -d /dev/video0
New timings found
VIDIOC_STREAMON: failed: Invalid argument

4

hello czyhit,

FYI, according to Camera Architecture Stack.
you should access UYVY camera sensor via v4l2src; since libargus and nvarguscamerasrc working with bayer formats.

seems you’re using V4L2 IOCTL to verify basic functionality during sensor bring-up, there’s failure for stream-on.
please also check Verifying the V4L2 Sensor Driver session to have compliance test; you may also refer to Debugging Tips session to review your sensor kernel drivers,
thanks

5

static struct v4l2_dv_timings default_timing = V4L2_DV_BT_CEA_1920X1080P38;

static int debug = 3;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, “debug level (0-3)”);

static const struct v4l2_dv_timings_cap lt6911uxc_timings_cap = {
.type = V4L2_DV_BT_656_1120,
/* keep this initialization for compatibility with GCC < 4.4.6 /
.reserved = { 0 },
/ Pixel clock from REF_01 p. 20. Min/max height/width are unknown */
V4L2_INIT_BT_TIMINGS(
1, 10000, 1, 10000, 0, 312000000,
V4L2_DV_BT_STD_CEA861,
V4L2_DV_BT_CAP_PROGRESSIVE |
V4L2_DV_BT_CAP_REDUCED_BLANKING |
V4L2_DV_BT_CAP_CUSTOM)

};

struct lt6911uxc_state {
struct lt6911uxc_platform_data pdata;
struct v4l2_subdev sd;
struct media_pad pad;
struct v4l2_ctrl_handler hdl;
struct i2c_client *i2c_client;
bool hdmi_signal_exist;

/* controls */
struct v4l2_ctrl *detect_tx_5v_ctrl;

/* work queues */
struct workqueue_struct *work_queues;
struct work_struct process_isr;
struct mutex isr_lock;
/* timing / mbus */
struct v4l2_dv_timings timings;
u32 mbus_fmt_code;
u32 isr_count;

};
static inline struct lt6911uxc_state *to_state(struct v4l2_subdev sd)
{
return container_of(sd, struct lt6911uxc_state, sd);
}
/ --------------- STATUS --------------- */
static inline bool tx_5v_power_present(struct v4l2_subdev *sd)
{
struct lt6911uxc_state state = to_state(sd);
return gpio_get_value(state->pdata.detect_gpio);
}
/ --------------- TIMINGS --------------- */
static inline unsigned fps(const struct v4l2_bt_timings *t)
{
if (!V4L2_DV_BT_FRAME_HEIGHT(t) || !V4L2_DV_BT_FRAME_WIDTH(t))
return 0;

return DIV_ROUND_CLOSEST((unsigned)t->pixelclock,
		V4L2_DV_BT_FRAME_HEIGHT(t) * V4L2_DV_BT_FRAME_WIDTH(t));

}
/* --------------- HOTPLUG / HDCP / EDID --------------- */

/* --------------- AVI infoframe --------------- */

/* --------------- CTRLS --------------- */
static int lt6911uxc_s_ctrl_detect_tx_5v(struct v4l2_subdev *sd)
{
struct lt6911uxc_state *state = to_state(sd);

return v4l2_ctrl_s_ctrl(state->detect_tx_5v_ctrl,
	tx_5v_power_present(sd));

}

static int lt6911uxc_update_controls(struct v4l2_subdev *sd)
{
int ret = 0;

ret |= lt6911uxc_s_ctrl_detect_tx_5v(sd);

return ret;

}

/* --------------- IRQ --------------- */
static void lt6911uxc_hdmi_int_handler(struct v4l2_subdev *sd,
bool *handled)
{
u8 temp;
struct lt6911uxc_state *state = to_state(sd);
temp = read_int_event(sd);
if (temp == HDMI_DISAPPEAR_EVENT) {
v4l2_dbg(3, debug, sd, “%s: HDMI_DISAPPEAR_EVENT\n”, func);
state->hdmi_signal_exist = false;
if (handled)
*handled = true;
} else if (temp == HDMI_STABLE_EVENT) {
v4l2_dbg(3, debug, sd, “%s: HDMI_STABLE_EVENT\n”, func);
if (state->isr_count == 1) {
read_mipi_rs(sd);
read_mipi_lanenum(sd);
read_half_pixel_clk(sd);
read_byte_clk(sd);
}
//enable_mipi_out(sd);
state->hdmi_signal_exist = true;
if (handled)
handled = true;
} else {
v4l2_err(sd, “%s: Unhandled HDMI interrupts: 0x%02x\n”,
func, temp);
}
}
/ --------------- CORE OPS --------------- */

static int lt6911uxc_isr(struct v4l2_subdev *sd, u32 status, bool *handled)
{
if (status == 1) {
external_i2c_ctl(sd, true);
read_chipid(sd);
read_fwversion(sd);
lt6911uxc_hdmi_int_handler(sd, handled);
external_i2c_ctl(sd, false);
} else {
external_i2c_ctl(sd, true);
lt6911uxc_hdmi_int_handler(sd, handled);
external_i2c_ctl(sd, false);
}
return 0;
}

static void lt6911uxc_process_isr(struct work_struct *work)
{
struct lt6911uxc_state *state = container_of(work,
struct lt6911uxc_state, process_isr);
struct v4l2_subdev *sd = &state->sd;
bool handled;
state->isr_count++;
v4l2_dbg(2, debug, sd, “%s: %d\n”, func, state->isr_count);

mutex_lock(&state->isr_lock);
lt6911uxc_isr(sd, state->isr_count, &handled);
mutex_unlock(&state->isr_lock);

}

static irqreturn_t lt6911uxc_irq_handler(int irq, void *dev_id)
{
struct v4l2_subdev *sd = dev_id;
struct lt6911uxc_state *state = to_state(sd);

queue_work(state->work_queues, &state->process_isr);

return IRQ_HANDLED;

}

static int lt6911uxc_s_power(struct v4l2_subdev *sd, int on)
{
return 0;
}

static int lt6911uxc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
struct v4l2_event_subscription *sub)
{
switch (sub->type) {
case V4L2_EVENT_SOURCE_CHANGE:
return v4l2_src_change_event_subdev_subscribe(sd, fh, sub);
case V4L2_EVENT_CTRL:
return v4l2_ctrl_subdev_subscribe_event(sd, fh, sub);
default:
return -EINVAL;
}
}

/* --------------- PAD OPS --------------- */
static int lt6911uxc_get_fmt(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_format *format)
{
struct lt6911uxc_state *state = to_state(sd);
struct v4l2_mbus_framefmt *fmt;

v4l2_dbg(3, debug, sd, "%s():\n", __func__);

if (format->pad != 0)
	return -EINVAL;

format->format.code = state->mbus_fmt_code;
format->format.width = state->timings.bt.width;
format->format.height = state->timings.bt.height;
format->format.field = V4L2_FIELD_NONE;
format->format.colorspace = V4L2_COLORSPACE_SRGB;

fmt = &format->format;
v4l2_dbg(3, debug, sd,
	"%s(): width=%d, height=%d, code=0x%08X, field=%d\n",
	__func__, fmt->width, fmt->height, fmt->code, fmt->field);

return 0;

}

static int lt6911uxc_set_fmt(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_format *format)
{
struct lt6911uxc_state state = to_state(sd);
u32 code = format->format.code; / is overwritten by get_fmt */
int ret = lt6911uxc_get_fmt(sd, cfg, format);

v4l2_dbg(3, debug, sd, "%s():\n", __func__);

format->format.code = code;

if (ret)
	return ret;

switch (code) {
case MEDIA_BUS_FMT_UYVY8_1X16:
	break;
default:
	return -EINVAL;
}

if (format->which == V4L2_SUBDEV_FORMAT_TRY)
	return 0;

v4l2_dbg(3, debug, sd, "%s(): format->which=%d\n",
	__func__, format->which);

state->mbus_fmt_code = format->format.code;

return 0;

}

/* --------------- VIDEO OPS --------------- */

static inline bool no_signal(struct v4l2_subdev *sd)
{
struct lt6911uxc_state *state = to_state(sd);
return !state->hdmi_signal_exist;
}

static int lt6911uxc_g_input_status(struct v4l2_subdev *sd, u32 *status)
{
*status = 0;
*status |= no_signal(sd) ? V4L2_IN_ST_NO_SIGNAL : 0;

v4l2_dbg(1, debug, sd, "%s: status = 0x%x\n", __func__, *status);

return 0;

}
static int lt6911uxc_s_dv_timings(struct v4l2_subdev *sd,
struct v4l2_dv_timings *timings)
{
struct lt6911uxc_state *state = to_state(sd);

v4l2_dbg(3, debug, sd, "%s():\n", __func__);

if (!timings)
	return -EINVAL;

if (debug)
	v4l2_print_dv_timings(sd->name, "lt6911uxc_s_dv_timings: ",
			timings, false);

if (tegra_v4l2_match_dv_timings(&state->timings, timings, 0, false)) {
	v4l2_dbg(1, debug, sd, "%s: no change\n", __func__);
	return 0;
}

if (!v4l2_valid_dv_timings(timings, &lt6911uxc_timings_cap, NULL, NULL)) {
	v4l2_dbg(1, debug, sd, "%s: timings out of range\n", __func__);
	return -ERANGE;
}

state->timings = *timings;

return 0;

}

static int lt6911uxc_g_dv_timings(struct v4l2_subdev *sd,
struct v4l2_dv_timings *timings)
{
struct lt6911uxc_state *state = to_state(sd);
v4l2_dbg(3, debug, sd, “%s():\n”, func);
*timings = state->timings;
return 0;
}

static int lt6911uxc_query_dv_timings(struct v4l2_subdev *sd,
struct v4l2_dv_timings *timings)
{

v4l2_dbg(3, debug, sd, "%s():\n", __func__);

timings = &default_timing;

if (debug)
	v4l2_print_dv_timings(sd->name, "lt6911uxc_query_dv_timings: ",
		timings, false);
if (!v4l2_valid_dv_timings(timings, &lt6911uxc_timings_cap, NULL, NULL)) {
	v4l2_dbg(1, debug, sd, "%s: timings out of range\n", __func__);
	return -ERANGE;
}

return 0;

}

static int lt6911uxc_g_mbus_config(struct v4l2_subdev *sd,
struct v4l2_mbus_config *cfg)
{
v4l2_dbg(3, debug, sd, “%s():\n”, func);

cfg->type = V4L2_MBUS_CSI2;

/* Support for non-continuous CSI-2 clock is missing in the driver */
cfg->flags = V4L2_MBUS_CSI2_4_LANE 
	| V4L2_MBUS_CSI2_CONTINUOUS_CLOCK 
	| V4L2_MBUS_CSI2_CHANNEL_0;
return 0;

}

static int lt6911uxc_s_stream(struct v4l2_subdev *sd, int enable)
{
v4l2_dbg(3, debug, sd, “%s():\n”, func);
// how to start and stop
return 0;
}

static int lt6911uxc_enum_mbus_code(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_mbus_code_enum *code)
{
v4l2_dbg(2, debug, sd, “%s()\n”, func);

if (code->index >= 1)
	return -EINVAL;

switch (code->index) {
case 0:
	code->code = MEDIA_BUS_FMT_UYVY8_1X16;
	break;
}
return 0;

}
static int lt6911uxc_dv_timings_cap(struct v4l2_subdev *sd,
struct v4l2_dv_timings_cap *cap)
{
v4l2_dbg(3, debug, sd, “%s():\n”, func);

if (cap->pad != 0)
	return -EINVAL;

*cap = lt6911uxc_timings_cap;

return 0;

}

static int lt6911uxc_enum_dv_timings(struct v4l2_subdev *sd,
struct v4l2_enum_dv_timings *timings)
{
v4l2_dbg(3, debug, sd, “%s(): DUMMY\n”, func);

if (timings->pad != 0)
return -EINVAL;

return v4l2_enum_dv_timings_cap(timings,
&lt6911uxc_timings_cap, NULL, NULL);
}

static int lt6911uxc_enum_framesizes(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_frame_size_enum *fse)
{
const struct camera_common_frmfmt *frmfmt = lt6911uxc_frmfmt;
int num_frmfmt = ARRAY_SIZE(lt6911uxc_frmfmt);

v4l2_dbg(2, debug, sd, "%s()\n", __func__);

if (fse->code != V4L2_PIX_FMT_UYVY)
	return -EINVAL;

if (fse->index >= num_frmfmt)
	return -EINVAL;
fse->index = array_index_nospec(fse->index, num_frmfmt);

fse->min_width = fse->max_width = frmfmt[fse->index].size.width;
fse->min_height = fse->max_height = frmfmt[fse->index].size.height;

return 0;

}

static int lt6911uxc_enum_frameintervals(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_frame_interval_enum *fie)
{
const struct camera_common_frmfmt *frmfmt = lt6911uxc_frmfmt;
int num_frmfmt = ARRAY_SIZE(lt6911uxc_frmfmt);
int i;

v4l2_dbg(2, debug, sd, "%s()\n", __func__);

if (fie->code != V4L2_PIX_FMT_UYVY)
	return -EINVAL;

for (i = 0; i < num_frmfmt; i++) {
	if (frmfmt[i].size.width == fie->width &&
	    frmfmt[i].size.height == fie->height)
		break;
}
if (i >= num_frmfmt)
	return -EINVAL;

if (fie->index >= frmfmt[i].num_framerates)
	return -EINVAL;

fie->index = array_index_nospec(fie->index, frmfmt[i].num_framerates);

fie->interval.numerator = 1;
fie->interval.denominator = frmfmt[i].framerates[fie->index];

return 0;

}

static struct v4l2_subdev_core_ops lt6911uxc_subdev_core_ops = {
.s_power = lt6911uxc_s_power,
.subscribe_event = lt6911uxc_subscribe_event,
.unsubscribe_event = v4l2_event_subdev_unsubscribe,
};

static struct v4l2_subdev_video_ops lt6911uxc_subdev_video_ops = {
.g_input_status = lt6911uxc_g_input_status,
.s_dv_timings = lt6911uxc_s_dv_timings,
.g_dv_timings = lt6911uxc_g_dv_timings,
.query_dv_timings = lt6911uxc_query_dv_timings,
.g_mbus_config = lt6911uxc_g_mbus_config,
.s_stream = lt6911uxc_s_stream,
};
static const struct v4l2_subdev_pad_ops lt6911uxc_pad_ops = {
.set_fmt = lt6911uxc_set_fmt,
.get_fmt = lt6911uxc_get_fmt,
.enum_mbus_code = lt6911uxc_enum_mbus_code,
.dv_timings_cap = lt6911uxc_dv_timings_cap,
.enum_dv_timings = lt6911uxc_enum_dv_timings,
.enum_frame_size = lt6911uxc_enum_framesizes,
.enum_frame_interval = lt6911uxc_enum_frameintervals,
};

static struct v4l2_subdev_ops lt6911uxc_ops = {
.core = &lt6911uxc_subdev_core_ops,
.video = &lt6911uxc_subdev_video_ops,
.pad = &lt6911uxc_pad_ops,
};

/* --------------- CUSTOM CTRLS --------------- */

/* --------------- INIT --------------- */
static void lt6911uxc_initial_setup(struct v4l2_subdev *sd)
{
//static struct v4l2_dv_timings default_timing;
struct lt6911uxc_state state = to_state(sd);
v4l2_dbg(3, debug, sd, “%s():\n”, func);
state->mbus_fmt_code = MEDIA_BUS_FMT_UYVY8_1X16;
state->isr_count = 0;
/ *** Init CSI *** */
lt6911uxc_s_dv_timings(sd, &default_timing);
}

/* --------------- PROBE / REMOVE --------------- */

#ifdef CONFIG_OF

static bool lt6911uxc_parse_dt(struct lt6911uxc_platform_data *pdata,
struct i2c_client *client)
{
struct device_node *node = client->dev.of_node;

v4l_dbg(1, debug, client, "Device Tree Parameters:\n");

pdata->reset_gpio = of_get_named_gpio(node, "reset-gpios", 0);
if (pdata->reset_gpio == 0)
	return false;
v4l_dbg(1, debug, client, "reset_gpio = %d\n", pdata->reset_gpio);

pdata->detect_gpio = of_get_named_gpio(node, "detect-gpios", 0);
if (pdata->detect_gpio == 0)
	return false;
v4l_dbg(1, debug, client, "detect_gpio = %d\n", pdata->detect_gpio);

// if (v4l2_of_parse_endpoint(node, &pdata->endpoint))
// return false;
return true;
}
#endif

static int lt6911uxc_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);

dev_dbg(&client->dev, "%s:\n", __func__);
return 0;

}

static const struct v4l2_subdev_internal_ops lt6911uxc_subdev_internal_ops = {
.open = lt6911uxc_open,
};

static const struct media_entity_operations lt6911uxc_media_ops = {
#ifdef CONFIG_MEDIA_CONTROLLER
.link_validate = v4l2_subdev_link_validate,
#endif
};

static int lt6911uxc_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
struct lt6911uxc_state *state;
struct v4l2_subdev *sd;
int err;

state = devm_kzalloc(&client->dev, sizeof(struct lt6911uxc_state), GFP_KERNEL);
if (!state)
	return -ENOMEM;

if (client->dev.of_node) {
	if (!lt6911uxc_parse_dt(&state->pdata, client)) {
		v4l_err(client, "Couldn't parse device tree\n");
		return -ENODEV;
	}
} else {
	if (!client->dev.platform_data) {
		v4l_err(client, "No platform data!\n");
		return -ENODEV;
	}
	state->pdata = *(struct lt6911uxc_platform_data *)client->dev.platform_data;
}

state->i2c_client = client;
sd = &state->sd;

i2c_set_clientdata(client, state);

v4l2_i2c_subdev_init(sd, client, &lt6911uxc_ops);

/* Release System Reset (pin RSTN) */
v4l2_info(sd, "Releasing System Reset (gpio 0x%04X)\n",
	state->pdata.reset_gpio);
if (!gpio_is_valid(state->pdata.reset_gpio)) {
	v4l_err(client, "Reset GPIO is invalid!\n");
	return state->pdata.reset_gpio;
}
err = devm_gpio_request_one(&client->dev, state->pdata.reset_gpio,
				GPIOF_OUT_INIT_HIGH, "cam0-rst");
if (err) {
	dev_err(&client->dev,
		"Failed to request Reset GPIO 0x%04X: %d\n",
		state->pdata.reset_gpio, err);
	return err;
}

/*  */
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
	return -EIO;
v4l_info(client, "Chip found @%02X (%s)\n",
	client->addr, client->adapter->name);
/* Control Handlers */
v4l2_ctrl_handler_init(&state->hdl, 1);

/* Custom controls */
state->detect_tx_5v_ctrl = v4l2_ctrl_new_std(&state->hdl, NULL,
		V4L2_CID_DV_RX_POWER_PRESENT, 0, 1, 0, 0);

if (state->hdl.error) {
	err = state->hdl.error;
	goto err_hdl;
}

sd->ctrl_handler = &state->hdl;

if (lt6911uxc_update_controls(sd)) {
	err = -ENODEV;
	goto err_hdl;
}

/* Work Queues */
state->work_queues = create_singlethread_workqueue(client->name);
if (!state->work_queues) {
	v4l2_err(sd, "Could not create work queue!\n");
	err = -ENOMEM;
	goto err_hdl;
}
INIT_WORK(&state->process_isr, lt6911uxc_process_isr);
mutex_init(&state->isr_lock);

/* Initial Setup */
lt6911uxc_initial_setup(sd);
/* Get interrupt */
if (client->irq) {
	err = devm_request_threaded_irq(&state->i2c_client->dev,
					client->irq, NULL, lt6911uxc_irq_handler,
					IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
					sd->name, (void *)sd);
	if (err) {
		v4l2_err(sd, "Could not request interrupt %d!\n",
			 client->irq);
		goto err_hdl;
	}
}

v4l2_info(sd, "%s found @%02X (%s)\n", client->name,
	  client->addr, client->adapter->name);

sd->dev	= &client->dev;
sd->internal_ops = &lt6911uxc_subdev_internal_ops;
sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS;

#if defined(CONFIG_MEDIA_CONTROLLER)
state->pad.flags = MEDIA_PAD_FL_SOURCE;
sd->entity.ops = &lt6911uxc_media_ops;
err = tegra_media_entity_init(&sd->entity, 1,
&state->pad, true, true);
if (err < 0) {
dev_err(&client->dev, “unable to init media entity\n”);
return err;
}
#endif
err = v4l2_async_register_subdev(sd);
if (err == 0) {
v4l2_info(sd, “%s success probe end\n”, client->name);
return 0;
}

err_hdl:
v4l2_ctrl_handler_free(&state->hdl);
return err;
}

static int lt6911uxc_remove(struct i2c_client *client)
{
struct v4l2_subdev *sd = i2c_get_clientdata(client);

v4l_dbg(1, debug, client, "%s()\n", __func__);

#if defined(CONFIG_MEDIA_CONTROLLER)
media_entity_cleanup(&sd->entity);
#endif
return 0;
}

6

Hello, JerryChang, first I write DTSI likes tegra194-camera-imx274-hdmi.dtsi, so I have two camera, 1 imx274 and lt6911uxc.
By the way, MEDIA_BUS_FMT_UYVY8_1X16 and MEDIA_BUS_FMT_UYVY8_2X8, which one is correct for YUV422 UYUV?

7

xavier@xavier-desktop:~$ v4l2-ctl --all
Driver Info (not using libv4l2):
Driver name : tegra-video
Card type : vi-output, lt6911uxc 2-002b
Bus info : platform:15c10000.vi:4
Driver version: 4.9.140
Capabilities : 0x84200001
Video Capture
Streaming
Extended Pix Format
Device Capabilities
Device Caps : 0x04200001
Video Capture
Streaming
Extended Pix Format
Priority: 2
Video input : 0 (HDMI 4: ok)
DV timings:
Active width: 1920
Active height: 1080
Total width: 2200
Total height: 1125
Frame format: progressive
Polarities: +vsync +hsync
Pixelclock: 92998000 Hz (37.57 frames per second)
Horizontal frontporch: 88
Horizontal sync: 44
Horizontal backporch: 148
Vertical frontporch: 4
Vertical sync: 5
Vertical backporch: 36
Standards: CTA-861
Flags: framerate can be reduced by 1/1.001, CE-video
DV timings capabilities:
Minimum Width: 1
Maximum Width: 10000
Minimum Height: 1
Maximum Height: 10000
Minimum PClock: 0
Maximum PClock: 312000000
Standards: CTA-861
Capabilities: Progressive, Reduced Blanking, Custom Formats
Format Video Capture:
Width/Height : 1920/1080
Pixel Format : ‘UYVY’
Field : None
Bytes per Line : 3840
Size Image : 4147200
Colorspace : sRGB
Transfer Function : Default (maps to sRGB)
YCbCr/HSV Encoding: Default (maps to ITU-R 601)
Quantization : Default (maps to Limited Range)
Flags :

Camera Controls

       sensor_configuration 0x009a2032 (u32)    : min=0 max=0 step=0 default=0 flags=read-only, volatile, has-payload
     sensor_mode_i2c_packet 0x009a2033 (u32)    : min=0 max=0 step=0 default=0 flags=read-only, volatile, has-payload
  sensor_control_i2c_packet 0x009a2034 (u32)    : min=0 max=0 step=0 default=0 flags=read-only, volatile, has-payload
                bypass_mode 0x009a2064 (intmenu): min=0 max=1 default=0 value=0
            override_enable 0x009a2065 (intmenu): min=0 max=1 default=0 value=0
               height_align 0x009a2066 (int)    : min=1 max=16 step=1 default=1 value=1
                 size_align 0x009a2067 (intmenu): min=0 max=2 default=0 value=0
           write_isp_format 0x009a2068 (int)    : min=1 max=1 step=1 default=1 value=1
   sensor_signal_properties 0x009a2069 (u32)    : min=0 max=0 step=0 default=0 flags=read-only, has-payload
    sensor_image_properties 0x009a206a (u32)    : min=0 max=0 step=0 default=0 flags=read-only, has-payload
  sensor_control_properties 0x009a206b (u32)    : min=0 max=0 step=0 default=0 flags=read-only, has-payload
          sensor_dv_timings 0x009a206c (u32)    : min=0 max=0 step=0 default=0 flags=read-only, has-payload
           low_latency_mode 0x009a206d (bool)   : default=0 value=0
               sensor_modes 0x009a2082 (int)    : min=0 max=30 step=1 default=30 value=30 flags=read-only

Digital Video Controls

              power_present 0x00a00964 (bitmask): max=0x00000001 default=0x00000000 value=0x00000001 flags=read-only
8

[ 3064.313239] Unable to handle kernel NULL pointer dereference at virtual address 000001e0
[ 3064.313410] Mem abort info:
[ 3064.313463] ESR = 0x96000005
[ 3064.313526] Exception class = DABT (current EL), IL = 32 bits
[ 3064.313627] SET = 0, FnV = 0
[ 3064.313684] EA = 0, S1PTW = 0
[ 3064.313744] Data abort info:
[ 3064.313797] ISV = 0, ISS = 0x00000005
[ 3064.313866] CM = 0, WnR = 0
[ 3064.313929] user pgtable: 4k pages, 39-bit VAs, pgd = ffffffc710470000
[ 3064.314050] [00000000000001e0] *pgd=0000000000000000, *pud=0000000000000000
[ 3064.314195] Internal error: Oops: 96000005 [#1] PREEMPT SMP
[ 3064.314331] Modules linked in: fuse bnep overlay nvs_bmi160 nvs nvgpu bluedroid_pm ip_tables x_tables
[ 3064.314653] CPU: 0 PID: 9827 Comm: v4l2-compliance Not tainted 4.9.140-tegra #55
[ 3064.314847] Hardware name: jetson-xavier (DT)
[ 3064.315170] task: ffffffc70f333800 task.stack: ffffffc7104b8000
[ 3064.315652] PC is at tegra_vi5_g_volatile_ctrl+0x48/0x120
[ 3064.316056] LR is at tegra_vi5_g_volatile_ctrl+0x2c/0x120
[ 3064.316513] pc : [] lr : [] pstate: 40400145
[ 3064.323778] sp : ffffffc7104bbac0
[ 3064.327017] x29: ffffffc7104bbac0 x28: ffffffc7c770fe00
[ 3064.333042] x27: 000000000f000000 x26: 0000000000000000
[ 3064.338468] x25: ffffff8009fafcc0 x24: 0000000000000047
[ 3064.344068] x23: 0000000000000001 x22: 0000000000000018
[ 3064.349317] x21: ffffffc7104bbb60 x20: ffffffc7daa28820
[ 3064.354404] x19: ffffffc7c770fe00 x18: 0000000000000001
[ 3064.360180] x17: 0000007f96f41b10 x16: ffffff80082722b8
[ 3064.365949] x15: ffffffffffffffff x14: ffffffc7104bbac0
[ 3064.371633] x13: ffffffc7104bb9c5 x12: 0000000000000000
[ 3064.377317] x11: ffffffc7104bb980 x10: ffffffc7104bb980
[ 3064.383006] x9 : 0000000000000002 x8 : 0000000000000002
[ 3064.388531] x7 : ffffff8008fa6dc8 x6 : 0000000000000090
[ 3064.394293] x5 : 000000000000008d x4 : 0000000000000001
[ 3064.399381] x3 : 00000000009a2033 x2 : 0000000000000000
[ 3064.404719] x1 : ffffffc70f333800 x0 : 00000000009a2032

[ 3064.411471] Process v4l2-compliance (pid: 9827, stack limit = 0xffffffc7104b8000)
[ 3064.418624] Call trace:
[ 3064.421031] [] tegra_vi5_g_volatile_ctrl+0x48/0x120
[ 3064.427480] [] v4l2_g_ext_ctrls+0x22c/0x2f0
[ 3064.432715] [] v4l_g_ext_ctrls+0xa0/0xd8
[ 3064.437792] [] __video_do_ioctl+0x204/0x2c8
[ 3064.443122] [] video_usercopy+0x2a0/0x6a0
[ 3064.448201] [] video_ioctl2+0x3c/0x50
[ 3064.453277] [] v4l2_ioctl+0x88/0x118
[ 3064.457834] [] do_vfs_ioctl+0xb0/0x8d8
[ 3064.463159] [] SyS_ioctl+0x8c/0xa8
[ 3064.467455] [] el0_svc_naked+0x34/0x38
[ 3064.472549] —[ end trace ec2e3dd91c7b8b7c ]—

9

hello czyhit,

both of MEDIA_BUS_FMT_UYVY8_1X16 and MEDIA_BUS_FMT_UYVY8_2X8 were support in the VI drivers,
you may also check below kernel sources for reference.
$L4T_Sources/r32.4.2/Linux_for_Tegra/source/public/kernel/nvidia/drivers/media/platform/tegra/camera/camera_common.c

static const struct camera_common_colorfmt camera_common_color_fmts[] = {
..
        {
                MEDIA_BUS_FMT_UYVY8_1X16,
                V4L2_COLORSPACE_SRGB,
                V4L2_PIX_FMT_UYVY,
        },
...
        {
                MEDIA_BUS_FMT_UYVY8_2X8,
                V4L2_COLORSPACE_SRGB,
                V4L2_PIX_FMT_UYVY,

also, it seems there’s sensor format reporting with v4l2 standard controls.
you should resolve your NULL pointer issue first, please dig into your sensor driver to check which property return NULL.
there’re default IO controls that you should examine one-by-one.
please check below functions,
for example,
$L4T_Sources/r32.4.2/Linux_for_Tegra/source/public/kernel/nvidia/drivers/media/platform/tegra/camera/vi/channel.c

static const struct v4l2_ioctl_ops tegra_channel_ioctl_ops = {
        .vidioc_querycap                = tegra_channel_querycap,
        .vidioc_enum_framesizes         = tegra_channel_enum_framesizes,
        .vidioc_enum_frameintervals     = tegra_channel_enum_frameintervals,
        .vidioc_enum_fmt_vid_cap        = tegra_channel_enum_format,
        .vidioc_g_fmt_vid_cap           = tegra_channel_get_format,
        .vidioc_s_fmt_vid_cap           = tegra_channel_set_format,
        .vidioc_try_fmt_vid_cap         = tegra_channel_try_format,
...
};
10

I used 32.1
static const struct camera_common_colorfmt camera_common_color_fmts = {
{
MEDIA_BUS_FMT_SRGGB12_1X12,
V4L2_COLORSPACE_SRGB,
V4L2_PIX_FMT_SRGGB12,
},
{
MEDIA_BUS_FMT_SGRBG12_1X12,
V4L2_COLORSPACE_SRGB,
V4L2_PIX_FMT_SGRBG12,
},
{
MEDIA_BUS_FMT_SRGGB10_1X10,
V4L2_COLORSPACE_SRGB,
V4L2_PIX_FMT_SRGGB10,
},
{
MEDIA_BUS_FMT_SGRBG10_1X10,
V4L2_COLORSPACE_SRGB,
V4L2_PIX_FMT_SGRBG10,
},
{
MEDIA_BUS_FMT_SBGGR10_1X10,
V4L2_COLORSPACE_SRGB,
V4L2_PIX_FMT_SBGGR10,
},
{
MEDIA_BUS_FMT_SRGGB8_1X8,
V4L2_COLORSPACE_SRGB,
V4L2_PIX_FMT_SRGGB8,
},
/*
* The below two formats are not supported by VI4,
* keep them at the last to ensure they get discarded
*/
{
MEDIA_BUS_FMT_XRGGB10P_3X10,
V4L2_COLORSPACE_SRGB,
V4L2_PIX_FMT_XRGGB10P,
},
{
MEDIA_BUS_FMT_XBGGR10P_3X10,
V4L2_COLORSPACE_SRGB,
V4L2_PIX_FMT_XRGGB10P,
},
};

11

I try 32.4.2

12

hello czyhit,

we had several driver updates to add default support formats.
please moving to the latest release (i.e. r32.4.2) for verification.
thanks

13

@JerryChang, Thanks, Now My driver can work in 32.4.2!