Thank you for providing this table mapping the I2C aliases!
But when I open the document I don’t see the base addresses there.
I’m still confused here, for two reasons:
Is there an official table which shows what you just pasted in?
After parsing device tree files for the better part of a day, it looks like you count the I2C buses from 1 while other litterature counts from 0.
@Nvidia: The current state of documentation keeps electrical engineers reasonably happy with names like “I2C_GP0” and core programmers reasonably happy with “i2c@3160000”. But when we work together it is hard to see overlaps in our documentation.
Hi borgeqm27i,
You can find that mapping in the Table 2: System Address Map (Page 49) of the NVIDIA Parker Series SoC TECHNICAL REFERENCE MANUAL (If it doesn’t work the link, type “Tegra X2 (Parker Series SoC) Technical Reference Manual” in the Jetson Download Center, you need to accept some EULA conditions)