Hello All,
Configured the Nvidia APE’s I2S Controller in Slave mode.
I want to know that I2S Controller in Master mode, i.e. other end, is generating these
clocks (Bit clock, Frame clock) and these clocks are reaching the Nvidia Tx2 I2S controller?
How to get these details in I2S controller’s registers? Any ideas? Without probing the signals.
-Thanks.
Hello!
You can check the TX2 I2S configuration by dumping the registers after booting via the Linux debugfs. For example, if you are using I2S1, then you can view the registers by …
$ sudo cat /sys/kernel/debug/regmap/tegra210-i2s.0/registers
The I2S register register I2S_CTRL_0 at offset 0xa0 (please refer to the TX2 TRM document) configures whether the I2S interface is master of slave via the MASTER bit (bit 10). For example, by default on my TX2 I see bit 10 is set in the I2S_CTRL_0 register indicating that the TX2 I2S is the master …
$ sudo grep "a0:" /sys/kernel/debug/regmap/tegra210-i2s.0/registers
a0: 1f000403
If the I2S interface is configured for slave and you start playback/capture, then if we are successfully playing/capturing data you know that it is working. If the TX2 I2S is not receiving the bitclock you will see an error such as …
tegra210-i2s tegra210-i2s.0: Failed at I2S0_TX sw reset
tegra210-i2s tegra210-i2s.0: ASoC: PRE_PMU: I2S1 DAP TX event failed: -22
This is a common error that we see when the I2S is not receiving the bitclock because software reset of the I2S interface fails. If the TX2 I2S is the slave, then you will definitely see an error when attempting capture/playback if there is no clock for frame signal.
Regards,
Jon