Is there any way to disable hardware prefetching in the XAVIER (Carmel core)?

I’m creating some micro-benchmarks in which I’d like to disable the Carmel’s data prefetcher programatically to see how the Xavier behaves without it.

Revising the documentation of another very well known ARM v8 architecture (Cortex A-53), I found the control register CPUACTLR_EL1, which provides a way to enable/disable this feature in the Cortex core (see L1PCTL). This makes possible to enable/disable the prefetcher programatically by simply adding this snippet before executing your benchmark [0]:

#define mask_DPreFetch 0xA000

void DisablePrefetcher()
{
	unsigned long long r = 0;
	unsigned long long mask = ~mask_DPreFetch;

	__asm__ __volatile__ (
		"MRS %0, S3_1_C15_C2_0" : "=r" (r)
	);

	r &= mask;

	__asm__ __volatile__ (
		"MSR S3_1_C15_C2_0, %0" : : "r" (r)
	);
}

I was wondering if there is something similar in the XAVIER, because when I tried to execute these same instructions in Carmel I get Illegal instruction (core dumped), which makes total sense, since the architecture is not totally equivalent besides being an ARM V8 brother.

Thank you for the help in advance!

I will forward this issue to internal team to see if can have suggestions. Thanks

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Hello, any updates on this? Thanks

From internal team:

There is no way to disable the hardware prefetchers for Xavier. That register is implementation defined and the bit definitions for every CPU are different.

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