I am streaming data from a FPGA via the CAM0/1 port on the Xavier NX devkit into the Xavier. (See device tree below)
Used device tree Xavier NX (mode1)
/*
* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <dt-bindings/media/camera.h>
/ {
host1x {
vi@15c10000 {
num-channels = <1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
vi_port0: port@0 {
reg = <0>;
liimx185_vi_in0: endpoint {
port-index = <0>;
bus-width = <2>;
remote-endpoint = <&liimx185_csi_out0>;
};
};
};
};
nvcsi@15a00000 {
num-channels = <1>;
#address-cells = <1>;
#size-cells = <0>;
csi_chan0: channel@0 {
reg = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
csi_chan0_port0: port@0 {
reg = <0>;
liimx185_csi_in0: endpoint@0 {
port-index = <0>;
bus-width = <2>;
remote-endpoint = <&liimx185_imx185_out0>;
};
};
csi_chan0_port1: port@1 {
reg = <1>;
liimx185_csi_out0: endpoint@1 {
remote-endpoint = <&liimx185_vi_in0>;
};
};
};
};
};
};
cam_i2cmux {
i2c_0:i2c@0 {
imx185_cam0: rbpcv2_imx185_a@1a {
compatible = "nvidia,imx185";
/* I2C device address */
reg = <0x1a>;
clocks = <&bpmp_clks TEGRA194_CLK_EXTPERIPH1>, <&bpmp_clks TEGRA194_CLK_EXTPERIPH1>;
clock-names = "extperiph1", "pllp_grtba";
mclk = "extperiph1";
clock-frequency = <24000000>;
/* V4L2 device node location */
devnode = "video0";
/* Physical dimensions of sensor */
physical_w = "15.0";
physical_h = "10.0";
sensor_model = "imx185";
use_sensor_mode_id = "false";
/**
* ==== Modes ====
* A modeX node is required to support v4l2 driver
* implementation with NVIDIA camera software stack
*
* == Signal properties ==
*
* phy_mode = "";
* PHY mode used by the MIPI lanes for this device
*
* tegra_sinterface = "";
* CSI Serial interface connected to tegra
* Incase of virtual HW devices, use virtual
* For SW emulated devices, use host
*
* pix_clk_hz = "";
* Sensor pixel clock used for calculations like exposure and framerate
*
* readout_orientation = "0";
* Based on camera module orientation.
* Only change readout_orientation if you specifically
* Program a different readout order for this mode
*
* == Image format Properties ==
*
* active_w = "";
* Pixel active region width
*
* active_h = "";
* Pixel active region height
*
* pixel_t = "";
* The sensor readout pixel pattern
*
* line_length = "";
* Pixel line length (width) for sensor mode.
*
* == Source Control Settings ==
*
* Gain factor used to convert fixed point integer to float
* Gain range [min_gain/gain_factor, max_gain/gain_factor]
* Gain step [step_gain/gain_factor is the smallest step that can be configured]
* Default gain [Default gain to be initialized for the control.
* use min_gain_val as default for optimal results]
* Framerate factor used to convert fixed point integer to float
* Framerate range [min_framerate/framerate_factor, max_framerate/framerate_factor]
* Framerate step [step_framerate/framerate_factor is the smallest step that can be configured]
* Default Framerate [Default framerate to be initialized for the control.
* use max_framerate to get required performance]
* Exposure factor used to convert fixed point integer to float
* For convenience use 1 sec = 1000000us as conversion factor
* Exposure range [min_exp_time/exposure_factor, max_exp_time/exposure_factor]
* Exposure step [step_exp_time/exposure_factor is the smallest step that can be configured]
* Default Exposure Time [Default exposure to be initialized for the control.
* Set default exposure based on the default_framerate for optimal exposure settings]
*
* gain_factor = ""; (integer factor used for floating to fixed point conversion)
* min_gain_val = ""; (ceil to integer)
* max_gain_val = ""; (ceil to integer)
* step_gain_val = ""; (ceil to integer)
* default_gain = ""; (ceil to integer)
* Gain limits for mode
*
* exposure_factor = ""; (integer factor used for floating to fixed point conversion)
* min_exp_time = ""; (ceil to integer)
* max_exp_time = ""; (ceil to integer)
* step_exp_time = ""; (ceil to integer)
* default_exp_time = ""; (ceil to integer)
* Exposure Time limits for mode (sec)
*
* framerate_factor = ""; (integer factor used for floating to fixed point conversion)
* min_framerate = ""; (ceil to integer)
* max_framerate = ""; (ceil to integer)
* step_framerate = ""; (ceil to integer)
* default_framerate = ""; (ceil to integer)
* Framerate limits for mode (fps)
*
* embedded_metadata_height = "";
* Sensor embedded metadata height in units of rows.
* If sensor does not support embedded metadata value should be 0.
*/
mode0 { /* 2048x128 */
mclk_khz = "20000";
num_lanes = "2";
tegra_sinterface = "serial_a";
phy_mode = "DPHY";
discontinuous_clk = "no";
dpcm_enable = "false";
cil_settletime = "0";
dynamic_pixel_bit_depth = "12";
csi_pixel_bit_depth = "12";
mode_type = "bayer";
pixel_phase = "rggb";
active_w = "2048";
active_h = "128";
readout_orientation = "0";
line_length = "2048";
inherent_gain = "1";
mclk_multiplier = "4";
pix_clk_hz = "80000000";
gain_factor = "1";
framerate_factor = "1000000";
exposure_factor = "1000000";
min_gain_val = "0"; /* 0 dB */
max_gain_val = "24"; /* 24 dB */
step_gain_val = "1";
default_gain = "0"; /* 0 dB */
min_hdr_ratio = "1";
max_hdr_ratio = "1";
min_framerate = "10000000"; /* 10 fps */
max_framerate = "100000000"; /* 100 fps */
step_framerate = "1";
default_framerate = "20000000"; /* 20 fps */
min_exp_time = "10"; /* us */
max_exp_time = "1000"; /* us */
step_exp_time = "1";
default_exp_time = "100"; /* us */
embedded_metadata_height = "0";
};
mode1 { /* 3648x2304 */
mclk_khz = "20000";
num_lanes = "2";
tegra_sinterface = "serial_a";
phy_mode = "DPHY";
discontinuous_clk = "no";
dpcm_enable = "false";
cil_settletime = "0";
dynamic_pixel_bit_depth = "12";
csi_pixel_bit_depth = "12";
mode_type = "bayer";
pixel_phase = "rggb";
active_w = "3648";
active_h = "2304";
readout_orientation = "0";
line_length = "3648";
inherent_gain = "1";
mclk_multiplier = "4";
pix_clk_hz = "80000000";
gain_factor = "1";
framerate_factor = "1000000";
exposure_factor = "1000000";
min_gain_val = "0"; /* 0 dB */
max_gain_val = "24"; /* 24 dB */
step_gain_val = "1";
default_gain = "0"; /* 0 dB */
min_hdr_ratio = "1";
max_hdr_ratio = "1";
min_framerate = "10000000"; /* 10 fps */
max_framerate = "100000000"; /* 100 fps */
step_framerate = "1";
default_framerate = "20000000"; /* 20 fps */
min_exp_time = "10"; /* us */
max_exp_time = "1000"; /* us */
step_exp_time = "1";
default_exp_time = "100"; /* us */
embedded_metadata_height = "0";
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
liimx185_imx185_out0: endpoint {
port-index = <0>;
bus-width = <2>;
remote-endpoint = <&liimx185_csi_in0>;
};
};
};
};
};
};
lens_imx185@RBPCV2 {
min_focus_distance = "0.0";
hyper_focal = "0.0";
focal_length = "3.04";
f_number = "2.0";
aperture = "0.0";
};
};
/ {
tcp: tegra-camera-platform {
compatible = "nvidia, tegra-camera-platform";
/**
* Physical settings to calculate max ISO BW
*
* num_csi_lanes = <>;
* Total number of CSI lanes when all cameras are active
*
* max_lane_speed = <>;
* Max lane speed in Kbit/s
*
* min_bits_per_pixel = <>;
* Min bits per pixel
*
* vi_peak_byte_per_pixel = <>;
* Max byte per pixel for the VI ISO case
*
* vi_bw_margin_pct = <>;
* Vi bandwidth margin in percentage
*
* max_pixel_rate = <>;
* Max pixel rate in Kpixel/s for the ISP ISO case
*
* isp_peak_byte_per_pixel = <>;
* Max byte per pixel for the ISP ISO case
*
* isp_bw_margin_pct = <>;
* Isp bandwidth margin in percentage
*/
num_csi_lanes = <2>;
max_lane_speed = <1500000>;
min_bits_per_pixel = <12>;
vi_peak_byte_per_pixel = <2>;
vi_bw_margin_pct = <25>;
max_pixel_rate = <240000>;
isp_peak_byte_per_pixel = <5>;
isp_bw_margin_pct = <25>;
/**
* The general guideline for naming badge_info contains 3 parts, and is as follows,
* The first part is the camera_board_id for the module; if the module is in a FFD
* platform, then use the platform name for this part.
* The second part contains the position of the module, ex. "rear" or "front".
* The third part contains the last 6 characters of a part number which is found
* in the module's specsheet from the vendor.
*/
modules {
cam_module0: module0 {
badge = "imx185_front_liimx185";
position = "front";
orientation = "0";
cam_module0_drivernode0: drivernode0 {
pcl_id = "v4l2_sensor";
devname = "imx185 30-001a";
proc-device-tree = "/proc/device-tree/cam_i2cmux/i2c@0/rbpcv2_imx185_a@1a";
};
cam_module0_drivernode1: drivernode1 {
pcl_id = "v4l2_lens";
proc-device-tree = "/proc/device-tree/lens_imx185@RBPCV2/";
};
};
};
};
};
This works without issue, but when I try to do the same thing on the NANO it does not work. (See dmesg and device tree below)
dmesg when streaming data via CAM1
[ 1207.567389] imx185 7-001a: camera_common_mclk_enable: enable MCLK with 20000000 Hz
[ 1207.575100] imx185 7-001a: camera_common_dpd_disable: csi 0
[ 1207.580741] imx185 7-001a: imx185_power_on: power on
[ 1207.585777] vi 54080000.vi: Calibrate csi port 0
[ 1207.585923] imx185 7-001a: imx185_power_off: power off
[ 1207.591159] imx185 7-001a: camera_common_dpd_enable: csi 0
[ 1207.596821] imx185 7-001a: camera_common_mclk_disable: disable MCLK
[ 1207.603160] imx185 8-001a: camera_common_mclk_enable: enable MCLK with 20000000 Hz
[ 1207.610816] imx185 8-001a: camera_common_dpd_disable: csi 4
[ 1207.616472] imx185 8-001a: imx185_power_on: power on
[ 1207.621468] vi 54080000.vi: Calibrate csi port 4
[ 1207.621591] imx185 8-001a: imx185_power_off: power off
[ 1207.626811] imx185 8-001a: camera_common_dpd_enable: csi 4
[ 1207.632327] imx185 8-001a: camera_common_mclk_disable: disable MCLK
[ 1207.638637] imx185 8-001a: camera_common_mclk_enable: enable MCLK with 20000000 Hz
[ 1207.646303] imx185 8-001a: camera_common_dpd_disable: csi 4
[ 1207.651947] imx185 8-001a: imx185_power_on: power on
[ 1207.658237] vi 54080000.vi: cil_settingtime was autocalculated
[ 1207.658243] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1207.859463] video4linux video1: frame start syncpt timeout!0
[ 1207.865661] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1207.865678] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000000
[ 1207.865693] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000000
[ 1207.865815] vi 54080000.vi: cil_settingtime was autocalculated
[ 1207.865833] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1208.067471] video4linux video1: frame start syncpt timeout!0
[ 1208.073724] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1208.073742] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000000
[ 1208.073757] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000000
[ 1208.074069] vi 54080000.vi: cil_settingtime was autocalculated
[ 1208.074095] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1208.275552] video4linux video1: frame start syncpt timeout!0
[ 1208.281587] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1208.281636] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000002
[ 1208.281681] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00020020
[ 1208.281894] vi 54080000.vi: cil_settingtime was autocalculated
[ 1208.281948] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1208.483630] video4linux video1: frame start syncpt timeout!0
[ 1208.489655] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00004000
[ 1208.489705] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000002
[ 1208.489749] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000000
[ 1208.489845] vi 54080000.vi: cil_settingtime was autocalculated
[ 1208.489863] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1208.691718] video4linux video1: frame start syncpt timeout!0
[ 1208.697729] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1208.697779] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000002
[ 1208.697825] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00020020
[ 1208.697973] vi 54080000.vi: cil_settingtime was autocalculated
[ 1208.697992] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1208.774807] vi 54080000.vi: tegra_channel_error_status:error 20022 frame 5
[ 1208.983353] video4linux video1: frame start syncpt timeout!0
[ 1208.989479] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1208.989529] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000000
[ 1208.989569] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000000
[ 1208.989661] vi 54080000.vi: cil_settingtime was autocalculated
[ 1208.989679] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1209.191523] video4linux video1: frame start syncpt timeout!0
[ 1209.197666] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1209.197716] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000002
[ 1209.197763] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00020020
[ 1209.197968] vi 54080000.vi: cil_settingtime was autocalculated
[ 1209.197990] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1209.399478] video4linux video1: frame start syncpt timeout!0
[ 1209.405505] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00004000
[ 1209.405556] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000000
[ 1209.405591] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000000
[ 1209.405682] vi 54080000.vi: cil_settingtime was autocalculated
[ 1209.405700] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1209.607533] video4linux video1: frame start syncpt timeout!0
[ 1209.613561] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1209.613609] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000000
[ 1209.613654] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000000
[ 1209.613771] vi 54080000.vi: cil_settingtime was autocalculated
[ 1209.613790] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1209.815509] video4linux video1: frame start syncpt timeout!0
[ 1209.821536] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1209.821585] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000002
[ 1209.821629] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00020020
[ 1209.821842] vi 54080000.vi: cil_settingtime was autocalculated
[ 1209.821893] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1210.023496] video4linux video1: frame start syncpt timeout!0
[ 1210.029526] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1210.029574] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000002
[ 1210.029617] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000000
[ 1210.029830] vi 54080000.vi: cil_settingtime was autocalculated
[ 1210.029881] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1210.231489] video4linux video1: frame start syncpt timeout!0
[ 1210.237510] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1210.237557] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000002
[ 1210.237601] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000000
[ 1210.237816] vi 54080000.vi: cil_settingtime was autocalculated
[ 1210.237868] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1210.275460] vi 54080000.vi: tegra_channel_error_status:error 2 frame 13
[ 1210.483712] video4linux video1: frame start syncpt timeout!0
[ 1210.489563] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1210.489588] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000000
[ 1210.489610] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000000
[ 1210.489689] vi 54080000.vi: cil_settingtime was autocalculated
[ 1210.489701] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1210.691475] video4linux video1: frame start syncpt timeout!0
[ 1210.697509] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1210.697559] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000000
[ 1210.697601] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000000
[ 1210.697819] vi 54080000.vi: cil_settingtime was autocalculated
[ 1210.697872] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1210.899477] video4linux video1: frame start syncpt timeout!0
[ 1210.905502] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1210.905552] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000010
[ 1210.905596] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00040040
[ 1210.905812] vi 54080000.vi: cil_settingtime was autocalculated
[ 1210.905864] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1211.107322] video4linux video1: frame start syncpt timeout!0
[ 1211.113472] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1211.113494] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000000
[ 1211.113511] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000000
[ 1211.113603] vi 54080000.vi: cil_settingtime was autocalculated
[ 1211.113620] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1211.315472] video4linux video1: frame start syncpt timeout!0
[ 1211.321508] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1211.321558] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000000
[ 1211.321600] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000000
[ 1211.321813] vi 54080000.vi: cil_settingtime was autocalculated
[ 1211.321865] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1211.523469] video4linux video1: frame start syncpt timeout!0
[ 1211.529479] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00004000
[ 1211.529530] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000000
[ 1211.529574] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000000
[ 1211.529782] vi 54080000.vi: cil_settingtime was autocalculated
[ 1211.529835] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1211.731476] video4linux video1: frame start syncpt timeout!0
[ 1211.737504] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1211.737552] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000000
[ 1211.737596] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000000
[ 1211.737806] vi 54080000.vi: cil_settingtime was autocalculated
[ 1211.737859] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1211.979476] video4linux video1: frame start syncpt timeout!0
[ 1211.985789] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1211.985806] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000000
[ 1211.985821] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000000
[ 1211.985982] vi 54080000.vi: cil_settingtime was autocalculated
[ 1211.986003] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1212.187448] video4linux video1: frame start syncpt timeout!0
[ 1212.193706] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1212.193725] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000000
[ 1212.193740] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000000
[ 1212.193871] vi 54080000.vi: cil_settingtime was autocalculated
[ 1212.193890] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1212.395225] video4linux video1: frame start syncpt timeout!0
[ 1212.401482] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1212.401500] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000002
[ 1212.401517] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00020020
[ 1212.401677] vi 54080000.vi: cil_settingtime was autocalculated
[ 1212.401695] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1212.603453] video4linux video1: frame start syncpt timeout!0
[ 1212.609713] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1212.609731] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000002
[ 1212.609747] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00020020
[ 1212.609882] vi 54080000.vi: cil_settingtime was autocalculated
[ 1212.609900] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1212.811475] video4linux video1: frame start syncpt timeout!0
[ 1212.817401] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1212.817414] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000002
[ 1212.817426] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00020020
[ 1212.817498] vi 54080000.vi: cil_settingtime was autocalculated
[ 1212.817510] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1213.019423] video4linux video1: frame start syncpt timeout!0
[ 1213.025448] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1213.025497] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000002
[ 1213.025543] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00020020
[ 1213.025757] vi 54080000.vi: cil_settingtime was autocalculated
[ 1213.025811] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1213.227637] video4linux video1: frame start syncpt timeout!0
[ 1213.233671] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 1213.233722] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000002
[ 1213.233768] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00020020
[ 1213.233900] vi 54080000.vi: cil_settingtime was autocalculated
[ 1213.233920] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 1213.274744] vi 54080000.vi: tegra_channel_error_status:error 20022 frame 29
[ 1213.285513] imx185 8-001a: imx185_power_off: power off
[ 1213.291001] imx185 8-001a: camera_common_dpd_enable: csi 4
[ 1213.296621] imx185 8-001a: camera_common_mclk_disable: disable MCLK
Used device tree NANO
/*
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <dt-bindings/media/camera.h>
#include <dt-bindings/platform/t210/t210.h>
/ {
host1x {
vi_base: vi {
num-channels = <2>;
ports {
#address-cells = <1>;
#size-cells = <0>;
vi_port0: port@0 {
reg = <0>;
rbpcv2_imx185_vi_in0: endpoint {
port-index = <0>;
bus-width = <2>;
remote-endpoint = <&rbpcv2_imx185_csi_out0>;
};
};
vi_port1: port@1 {
reg = <1>;
rbpcv2_imx185_vi_in1: endpoint {
port-index = <4>;
bus-width = <2>;
remote-endpoint = <&rbpcv2_imx185_csi_out1>;
};
};
};
};
csi_base: nvcsi {
num-channels = <2>;
#address-cells = <1>;
#size-cells = <0>;
csi_chan0: channel@0 {
reg = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
csi_chan0_port0: port@0 {
reg = <0>;
rbpcv2_imx185_csi_in0: endpoint@0 {
port-index = <0>;
bus-width = <2>;
remote-endpoint = <&rbpcv2_imx185_dual_out0>;
};
};
csi_chan0_port1: port@1 {
reg = <1>;
rbpcv2_imx185_csi_out0: endpoint@1 {
remote-endpoint = <&rbpcv2_imx185_vi_in0>;
};
};
};
};
csi_chan1: channel@1 {
reg = <1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
csi_chan1_port0: port@2 {
reg = <0>;
rbpcv2_imx185_csi_in1: endpoint@2 {
port-index = <4>;
bus-width = <2>;
remote-endpoint = <&rbpcv2_imx185_out1>;
};
};
csi_chan1_port1: port@3 {
reg = <1>;
rbpcv2_imx185_csi_out1: endpoint@3 {
remote-endpoint = <&rbpcv2_imx185_vi_in1>;
};
};
};
};
};
};
cam_i2cmux {
i2c_0: i2c@0 {
imx185_cam0: rbpcv2_imx185_a@1a {
compatible = "nvidia,imx185";
/* I2C device address */
reg = <0x1a>;
/* Clocks */
clocks = <&tegra_car TEGRA210_CLK_EXTERN3>, <&tegra_car TEGRA210_CLK_EXTERN3>;
clock-names = "extperiph3", "pllp_grtba";
mclk = "extperiph3";
clock-frequency = <24000000>;
/* V4L2 device node location */
devnode = "video0";
/* Physical dimensions of sensor */
physical_w = "15.0";
physical_h = "10.0";
sensor_model = "imx185";
use_sensor_mode_id = "false";
/**
* ==== Modes ====
* A modeX node is required to support v4l2 driver
* implementation with NVIDIA camera software stack
*
* == Signal properties ==
*
* phy_mode = "";
* PHY mode used by the MIPI lanes for this device
*
* tegra_sinterface = "";
* CSI Serial interface connected to tegra
* Incase of virtual HW devices, use virtual
* For SW emulated devices, use host
*
* pix_clk_hz = "";
* Sensor pixel clock used for calculations like exposure and framerate
*
* readout_orientation = "0";
* Based on camera module orientation.
* Only change readout_orientation if you specifically
* Program a different readout order for this mode
*
* == Image format Properties ==
*
* active_w = "";
* Pixel active region width
*
* active_h = "";
* Pixel active region height
*
* pixel_t = "";
* The sensor readout pixel pattern
*
* line_length = "";
* Pixel line length (width) for sensor mode.
*
* == Source Control Settings ==
*
* Gain factor used to convert fixed point integer to float
* Gain range [min_gain/gain_factor, max_gain/gain_factor]
* Gain step [step_gain/gain_factor is the smallest step that can be configured]
* Default gain [Default gain to be initialized for the control.
* use min_gain_val as default for optimal results]
* Framerate factor used to convert fixed point integer to float
* Framerate range [min_framerate/framerate_factor, max_framerate/framerate_factor]
* Framerate step [step_framerate/framerate_factor is the smallest step that can be configured]
* Default Framerate [Default framerate to be initialized for the control.
* use max_framerate to get required performance]
* Exposure factor used to convert fixed point integer to float
* For convenience use 1 sec = 1000000us as conversion factor
* Exposure range [min_exp_time/exposure_factor, max_exp_time/exposure_factor]
* Exposure step [step_exp_time/exposure_factor is the smallest step that can be configured]
* Default Exposure Time [Default exposure to be initialized for the control.
* Set default exposure based on the default_framerate for optimal exposure settings]
*
* gain_factor = ""; (integer factor used for floating to fixed point conversion)
* min_gain_val = ""; (ceil to integer)
* max_gain_val = ""; (ceil to integer)
* step_gain_val = ""; (ceil to integer)
* default_gain = ""; (ceil to integer)
* Gain limits for mode
*
* exposure_factor = ""; (integer factor used for floating to fixed point conversion)
* min_exp_time = ""; (ceil to integer)
* max_exp_time = ""; (ceil to integer)
* step_exp_time = ""; (ceil to integer)
* default_exp_time = ""; (ceil to integer)
* Exposure Time limits for mode (sec)
*
* framerate_factor = ""; (integer factor used for floating to fixed point conversion)
* min_framerate = ""; (ceil to integer)
* max_framerate = ""; (ceil to integer)
* step_framerate = ""; (ceil to integer)
* default_framerate = ""; (ceil to integer)
* Framerate limits for mode (fps)
*
* embedded_metadata_height = "";
* Sensor embedded metadata height in units of rows.
* If sensor does not support embedded metadata value should be 0.
*/
mode0 { /* 3648x2304 */
mclk_khz = "20000";
num_lanes = "2";
tegra_sinterface = "serial_a";
phy_mode = "DPHY";
discontinuous_clk = "no";
dpcm_enable = "false";
cil_settletime = "0";
dynamic_pixel_bit_depth = "12";
csi_pixel_bit_depth = "12";
mode_type = "bayer";
pixel_phase = "rggb";
active_w = "3648";
active_h = "2304";
readout_orientation = "0";
line_length = "3648";
inherent_gain = "1";
mclk_multiplier = "4";
pix_clk_hz = "80000000";
gain_factor = "1";
framerate_factor = "1000000";
exposure_factor = "1000000";
min_gain_val = "0"; /* 0 dB */
max_gain_val = "24"; /* 24 dB */
step_gain_val = "1";
default_gain = "0"; /* 0 dB */
min_hdr_ratio = "1";
max_hdr_ratio = "1";
min_framerate = "100000"; /* 0.1 fps */
max_framerate = "100000000"; /* 100 fps */
step_framerate = "1";
default_framerate = "20000000"; /* 20 fps */
min_exp_time = "10"; /* us */
max_exp_time = "1000"; /* us */
step_exp_time = "1";
default_exp_time = "100"; /* us */
embedded_metadata_height = "0";
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
rbpcv2_imx185_dual_out0: endpoint {
port-index = <0>;
bus-width = <2>;
remote-endpoint = <&rbpcv2_imx185_csi_in0>;
};
};
};
};
};
i2c_1: i2c@1 {
imx185_cam1: rbpcv2_imx185_e@1a {
compatible = "nvidia,imx185";
/* Clocks */
clocks = <&tegra_car TEGRA210_CLK_EXTERN3>, <&tegra_car TEGRA210_CLK_EXTERN3>;
clock-names = "extperiph3", "pllp_grtba";
mclk = "extperiph3";
clock-frequency = <24000000>;
/* I2C device address */
reg = <0x1a>;
/* V4L2 device node location */
devnode = "video1";
/* Physical dimensions of sensor */
physical_w = "15.0";
physical_h = "10.0";
sensor_model = "imx185";
use_sensor_mode_id = "false";
/**
* ==== Modes ====
* A modeX node is required to support v4l2 driver
* implementation with NVIDIA camera software stack
*
* == Signal properties ==
*
* phy_mode = "";
* PHY mode used by the MIPI lanes for this device
*
* tegra_sinterface = "";
* CSI Serial interface connected to tegra
* Incase of virtual HW devices, use virtual
* For SW emulated devices, use host
*
* pix_clk_hz = "";
* Sensor pixel clock used for calculations like exposure and framerate
*
* readout_orientation = "0";
* Based on camera module orientation.
* Only change readout_orientation if you specifically
* Program a different readout order for this mode
*
* == Image format Properties ==
*
* active_w = "";
* Pixel active region width
*
* active_h = "";
* Pixel active region height
*
* pixel_t = "";
* The sensor readout pixel pattern
*
* line_length = "";
* Pixel line length (width) for sensor mode.
*
* == Source Control Settings ==
*
* Gain factor used to convert fixed point integer to float
* Gain range [min_gain/gain_factor, max_gain/gain_factor]
* Gain step [step_gain/gain_factor is the smallest step that can be configured]
* Default gain [Default gain to be initialized for the control.
* use min_gain_val as default for optimal results]
* Framerate factor used to convert fixed point integer to float
* Framerate range [min_framerate/framerate_factor, max_framerate/framerate_factor]
* Framerate step [step_framerate/framerate_factor is the smallest step that can be configured]
* Default Framerate [Default framerate to be initialized for the control.
* use max_framerate to get required performance]
* Exposure factor used to convert fixed point integer to float
* For convenience use 1 sec = 1000000us as conversion factor
* Exposure range [min_exp_time/exposure_factor, max_exp_time/exposure_factor]
* Exposure step [step_exp_time/exposure_factor is the smallest step that can be configured]
* Default Exposure Time [Default exposure to be initialized for the control.
* Set default exposure based on the default_framerate for optimal exposure settings]
*
* gain_factor = ""; (integer factor used for floating to fixed point conversion)
* min_gain_val = ""; (ceil to integer)
* max_gain_val = ""; (ceil to integer)
* step_gain_val = ""; (ceil to integer)
* default_gain = ""; (ceil to integer)
* Gain limits for mode
*
* exposure_factor = ""; (integer factor used for floating to fixed point conversion)
* min_exp_time = ""; (ceil to integer)
* max_exp_time = ""; (ceil to integer)
* step_exp_time = ""; (ceil to integer)
* default_exp_time = ""; (ceil to integer)
* Exposure Time limits for mode (sec)
*
* framerate_factor = ""; (integer factor used for floating to fixed point conversion)
* min_framerate = ""; (ceil to integer)
* max_framerate = ""; (ceil to integer)
* step_framerate = ""; (ceil to integer)
* default_framerate = ""; (ceil to integer)
* Framerate limits for mode (fps)
*
* embedded_metadata_height = "";
* Sensor embedded metadata height in units of rows.
* If sensor does not support embedded metadata value should be 0.
*/
mode0 { /* 3648x2304 */
mclk_khz = "20000";
num_lanes = "2";
tegra_sinterface = "serial_e";
phy_mode = "DPHY";
discontinuous_clk = "no";
dpcm_enable = "false";
cil_settletime = "0";
dynamic_pixel_bit_depth = "12";
csi_pixel_bit_depth = "12";
mode_type = "bayer";
pixel_phase = "rggb";
active_w = "3648";
active_h = "2304";
readout_orientation = "0";
line_length = "3648";
inherent_gain = "1";
mclk_multiplier = "4";
pix_clk_hz = "80000000";
gain_factor = "1";
framerate_factor = "1000000";
exposure_factor = "1000000";
min_gain_val = "0"; /* 0 dB */
max_gain_val = "24"; /* 24 dB */
step_gain_val = "1";
default_gain = "0"; /* 0 dB */
min_hdr_ratio = "1";
max_hdr_ratio = "1";
min_framerate = "100000"; /* 0.1 fps */
max_framerate = "100000000"; /* 100 fps */
step_framerate = "1";
default_framerate = "20000000"; /* 20 fps */
min_exp_time = "10"; /* us */
max_exp_time = "1000"; /* us */
step_exp_time = "1";
default_exp_time = "100"; /* us */
embedded_metadata_height = "0";
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
rbpcv2_imx185_out1: endpoint {
port-index = <4>;
bus-width = <2>;
remote-endpoint = <&rbpcv2_imx185_csi_in1>;
};
};
};
};
};
};
lens_imx185@RBPCV2 {
min_focus_distance = "0.0";
hyper_focal = "0.0";
focal_length = "3.04";
f_number = "2.0";
aperture = "0.0";
};
};
/ {
tcp: tegra-camera-platform {
compatible = "nvidia, tegra-camera-platform";
/**
* Physical settings to calculate max ISO BW
*
* num_csi_lanes = <>;
* Total number of CSI lanes when all cameras are active
*
* max_lane_speed = <>;
* Max lane speed in Kbit/s
*
* min_bits_per_pixel = <>;
* Min bits per pixel
*
* vi_peak_byte_per_pixel = <>;
* Max byte per pixel for the VI ISO case
*
* vi_bw_margin_pct = <>;
* Vi bandwidth margin in percentage
*
* max_pixel_rate = <>;
* Max pixel rate in Kpixel/s for the ISP ISO case
*
* isp_peak_byte_per_pixel = <>;
* Max byte per pixel for the ISP ISO case
*
* isp_bw_margin_pct = <>;
* Isp bandwidth margin in percentage
*/
num_csi_lanes = <4>;
max_lane_speed = <1500000>;
min_bits_per_pixel = <10>;
vi_peak_byte_per_pixel = <2>;
vi_bw_margin_pct = <25>;
max_pixel_rate = <240000>;
isp_peak_byte_per_pixel = <5>;
isp_bw_margin_pct = <25>;
/**
* The general guideline for naming badge_info contains 3 parts, and is as follows,
* The first part is the camera_board_id for the module; if the module is in a FFD
* platform, then use the platform name for this part.
* The second part contains the position of the module, ex. "rear" or "front".
* The third part contains the last 6 characters of a part number which is found
* in the module's specsheet from the vendor.
*/
modules {
cam_module0: module0 {
badge = "porg_front_RBPCV2";
position = "front";
orientation = "1";
cam_module0_drivernode0: drivernode0 {
pcl_id = "v4l2_sensor";
devname = "imx185 7-001a";
proc-device-tree = "/proc/device-tree/cam_i2cmux/i2c@0/rbpcv2_imx185_a@1a";
};
cam_module0_drivernode1: drivernode1 {
pcl_id = "v4l2_lens";
proc-device-tree = "/proc/device-tree/lens_imx185@RBPCV2/";
};
};
cam_module1: module1 {
badge = "porg_rear_RBPCV2";
position = "rear";
orientation = "1";
cam_module1_drivernode0: drivernode0 {
pcl_id = "v4l2_sensor";
devname = "imx185 8-001a";
proc-device-tree = "/proc/device-tree/cam_i2cmux/i2c@1/rbpcv2_imx185_e@1a";
};
cam_module1_drivernode1: drivernode1 {
pcl_id = "v4l2_lens";
proc-device-tree = "/proc/device-tree/lens_imx185@RBPCV2/";
};
};
};
};
};
The datastream from the FPGA is 3648x2304 in RAW12, with 0.66 fps and 2 Lanes.
Can you give me any lead on what might be wrong with my NANO device tree ?
Best Regards