Hi,
I am trying to develop a driver for a MIPI camera based on ov5693.c. I adopt the suggestions in https://devtalk.nvidia.com/default/topic/1049476/jetson-tx1/tx1-csi-without-i2c/4.
Hardware: TX1 with J120
Software: JetPack 3.3 with L4T R28.2
When I used the command
v4l2-ctl -d /dev/video0 --set-fmt-video=width=1280,height=720,pixelformat=YUYV --set-ctrl bypass_mode=0 --stream-mmap --stream-count=1 --stream-to=test.raw
I get the following errors
[ 974.582642] vi 54080000.vi: tegra_channel_error_status:error 22 frame 0
[ 974.668099] video4linux video0: frame start syncpt timeout!0
[ 974.752066] video4linux video0: frame start syncpt timeout!0
I enable the dynamic debug with the following command
echo file vi2_fops.c +p > /sys/kernel/debug/dynamic_debug/control
echo file csi2_fops.c +p > /sys/kernel/debug/dynamic_debug/control
Now I get the following messages
[ 3224.958555] vi 54080000.vi: Calibrate csi port 4
[ 3225.055095] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 3225.061701] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000000
[ 3225.067376] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000000
[ 3225.073277] vi 54080000.vi: cil_settingtime is pulled from device
[ 3225.079480] vi 54080000.vi: cil_settingtime was autocalculated
[ 3225.085467] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 3225.092428] vi 54080000.vi: cil_settingtime is pulled from device
[ 3225.098592] vi 54080000.vi: cil_settingtime was autocalculated
[ 3225.104501] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 3225.125054] vi 54080000.vi: tegra_channel_error_status:error 22 frame 0
[ 3225.138108] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 3225.144498] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000012
[ 3225.150133] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000060
[ 3225.155859] vi 54080000.vi: cil_settingtime is pulled from device
[ 3225.161984] vi 54080000.vi: cil_settingtime was autocalculated
[ 3225.167852] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 3225.184049] vi 54080000.vi: tegra_channel_error_status:error 22 frame 1
[ 3225.197102] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 3225.203485] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000012
[ 3225.209092] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000060
[ 3225.214847] vi 54080000.vi: cil_settingtime is pulled from device
[ 3225.220970] vi 54080000.vi: cil_settingtime was autocalculated
[ 3225.226896] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 3225.243061] vi 54080000.vi: tegra_channel_error_status:error 22 frame 2
[ 3225.256142] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 3225.262527] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000012
[ 3225.268131] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000060
[ 3225.273861] vi 54080000.vi: cil_settingtime is pulled from device
[ 3225.280014] vi 54080000.vi: cil_settingtime was autocalculated
[ 3225.285876] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 3225.302041] vi 54080000.vi: tegra_channel_error_status:error 22 frame 3
[ 3225.315118] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 3225.321504] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000012
[ 3225.327155] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000060
[ 3225.332882] vi 54080000.vi: cil_settingtime is pulled from device
[ 3225.339028] vi 54080000.vi: cil_settingtime was autocalculated
[ 3225.344940] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 3225.361126] vi 54080000.vi: tegra_channel_error_status:error 22 frame 4
[ 3225.374209] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 3225.380603] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000012
[ 3225.386212] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000060
[ 3225.391952] vi 54080000.vi: cil_settingtime is pulled from device
[ 3225.398083] vi 54080000.vi: cil_settingtime was autocalculated
[ 3225.403987] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 3225.420160] vi 54080000.vi: tegra_channel_error_status:error 22 frame 5
[ 3225.433222] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 3225.439639] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000012
[ 3225.445241] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000060
[ 3225.450935] vi 54080000.vi: cil_settingtime is pulled from device
[ 3225.457024] vi 54080000.vi: cil_settingtime was autocalculated
[ 3225.462854] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 3225.478976] vi 54080000.vi: tegra_channel_error_status:error 22 frame 6
[ 3225.491953] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 3225.498302] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000012
[ 3225.503898] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000060
[ 3225.509592] vi 54080000.vi: cil_settingtime is pulled from device
[ 3225.515681] vi 54080000.vi: cil_settingtime was autocalculated
[ 3225.521511] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 3225.537630] vi 54080000.vi: tegra_channel_error_status:error 22 frame 7
[ 3225.550606] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 3225.556955] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000012
[ 3225.562525] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000060
[ 3225.568239] vi 54080000.vi: cil_settingtime is pulled from device
[ 3225.574331] vi 54080000.vi: cil_settingtime was autocalculated
[ 3225.580158] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 3225.596280] vi 54080000.vi: tegra_channel_error_status:error 22 frame 8
[ 3225.609255] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 3225.615608] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000000
[ 3225.621177] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000060
[ 3225.626867] vi 54080000.vi: cil_settingtime is pulled from device
[ 3225.632984] vi 54080000.vi: cil_settingtime was autocalculated
[ 3225.638815] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
[ 3225.744568] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 3225.750935] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000012
[ 3225.756570] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000060
[ 3225.762280] vi 54080000.vi: cil_settingtime is pulled from device
[ 3225.768393] vi 54080000.vi: cil_settingtime was autocalculated
[ 3225.774230] vi 54080000.vi: csi clock settle time: 13, cil settle time: 10
What do these messages mean? And what is the possible reason for the errors?
Thank you!