Modifying FDT kernel_tegra210-p3448-0002-p3449-0000-b00.dtb
to FDT /boot/kernel_tegra210-p3448-0002-p3449-0000-b00.dtb
solved the error for not booting the device but SPI still not working.
I’ve tested with a simple led strip WS2813 which is working fine on Jetson Nano Dev Kit 4GB with the following python code:
import time
import board
import neopixel_spi as neopixel
NUM_PIXELS = 8
PIXEL_ORDER = neopixel.GRB
COLORS = (0xFF0000, 0x00FF00, 0x0000FF)
DELAY = 0.1
spi = board.SPI()
pixels = neopixel.NeoPixel_SPI(
spi, NUM_PIXELS, pixel_order=PIXEL_ORDER, auto_write=False
)
while True:
for color in COLORS:
for i in range(NUM_PIXELS):
pixels[i] = color
pixels.show()
time.sleep(DELAY)
pixels.fill(0)
This is the output for dtc -I fs /proc/device-tree | grep spi1
on device from Seeed:
spi1 = "/spi@7000d600";
hdr40_spi1 = "/spi@7000d400";
spi1_prod {
spi1_mosi_pc0 {
nvidia,pins = "spi1_mosi_pc0";
nvidia,function = "spi1";
spi1_sck_pc2 {
nvidia,pins = "spi1_sck_pc2";
nvidia,function = "spi1";
spi1_cs1_pc4 {
nvidia,pins = "spi1_cs1_pc4";
nvidia,function = "spi1";
spi1_mosi_pc0 {
nvidia,pins = "spi1_mosi_pc0";
spi1_sck_pc2 {
nvidia,pins = "spi1_sck_pc2";
spi1_cs1_pc4 {
nvidia,pins = "spi1_cs1_pc4";
spi1_cs0_pc3 {
nvidia,pins = "spi1_cs0_pc3";
spi1_miso_pc1 {
nvidia,pins = "spi1_miso_pc1";
spi1_cs0_pc3 {
nvidia,pins = "spi1_cs0_pc3";
nvidia,function = "spi1";
spi1_miso_pc1 {
nvidia,pins = "spi1_miso_pc1";
nvidia,function = "spi1";
spi1 = "/spi@7000d600";
and this is the output on Dev Kit:
spi1 = "/spi@7000d600";
hdr40_spi1 = "/spi@7000d400";
spi1_prod {
nvidia,pins = "spi1_miso_pc1";
nvidia,function = "spi1";
nvidia,pins = "spi1_cs1_pc4";
nvidia,function = "spi1";
nvidia,pins = "spi1_cs0_pc3";
nvidia,function = "spi1";
nvidia,pins = "spi1_mosi_pc0";
nvidia,function = "spi1";
nvidia,pins = "spi1_sck_pc2";
nvidia,function = "spi1";
spi1_mosi_pc0 {
nvidia,pins = "spi1_mosi_pc0";
spi1_sck_pc2 {
nvidia,pins = "spi1_sck_pc2";
spi1_cs1_pc4 {
nvidia,pins = "spi1_cs1_pc4";
spi1_cs0_pc3 {
nvidia,pins = "spi1_cs0_pc3";
spi1_miso_pc1 {
nvidia,pins = "spi1_miso_pc1";
spi1 = "/spi@7000d600";
This is the output for sudo cat /sys/kernel/debug/tegra_pinctrl_reg | grep -i spi
on device from Seeed
Bank: 1 Reg: 0x70003050 Val: 0x0000e015 -> spi1_mosi_pc0
Bank: 1 Reg: 0x70003054 Val: 0x0000e015 -> spi1_miso_pc1
Bank: 1 Reg: 0x70003058 Val: 0x0000e015 -> spi1_sck_pc2
Bank: 1 Reg: 0x7000305c Val: 0x0000e015 -> spi1_cs0_pc3
Bank: 1 Reg: 0x70003060 Val: 0x0000e015 -> spi1_cs1_pc4
Bank: 1 Reg: 0x70003064 Val: 0x00006016 -> spi2_mosi_pb4
Bank: 1 Reg: 0x70003068 Val: 0x00006016 -> spi2_miso_pb5
Bank: 1 Reg: 0x7000306c Val: 0x00006016 -> spi2_sck_pb6
Bank: 1 Reg: 0x70003070 Val: 0x00006016 -> spi2_cs0_pb7
Bank: 1 Reg: 0x70003074 Val: 0x00006015 -> spi2_cs1_pdd0
Bank: 1 Reg: 0x70003078 Val: 0x0000e015 -> spi4_mosi_pc7
Bank: 1 Reg: 0x7000307c Val: 0x0000e015 -> spi4_miso_pd0
Bank: 1 Reg: 0x70003080 Val: 0x0000e015 -> spi4_sck_pc5
Bank: 1 Reg: 0x70003084 Val: 0x0000e015 -> spi4_cs0_pc6
Bank: 1 Reg: 0x70003088 Val: 0x00002015 -> qspi_sck_pee0
Bank: 1 Reg: 0x7000308c Val: 0x00002015 -> qspi_cs_n_pee1
Bank: 1 Reg: 0x70003090 Val: 0x00002015 -> qspi_io0_pee2
Bank: 1 Reg: 0x70003094 Val: 0x00002015 -> qspi_io1_pee3
Bank: 1 Reg: 0x70003098 Val: 0x00002015 -> qspi_io2_pee4
Bank: 1 Reg: 0x7000309c Val: 0x00002015 -> qspi_io3_pee5
Bank: 0 Reg: 0x70000b70 Val: 0x00000001 -> drive_qspi_comp_control
Bank: 0 Reg: 0x70000b78 Val: 0x00000001 -> drive_qspi_lpbk_control
Bank: 0 Reg: 0x70000a78 Val: 0x00808000 -> drive_qspi_comp
and this is the output on Dev Kit
Bank: 1 Reg: 0x70003050 Val: 0x0000e044 -> spi1_mosi_pc0
Bank: 1 Reg: 0x70003054 Val: 0x0000e044 -> spi1_miso_pc1
Bank: 1 Reg: 0x70003058 Val: 0x0000e044 -> spi1_sck_pc2
Bank: 1 Reg: 0x7000305c Val: 0x0000e048 -> spi1_cs0_pc3
Bank: 1 Reg: 0x70003060 Val: 0x0000e048 -> spi1_cs1_pc4
Bank: 1 Reg: 0x70003064 Val: 0x00006016 -> spi2_mosi_pb4
Bank: 1 Reg: 0x70003068 Val: 0x00006016 -> spi2_miso_pb5
Bank: 1 Reg: 0x7000306c Val: 0x00006016 -> spi2_sck_pb6
Bank: 1 Reg: 0x70003070 Val: 0x00006016 -> spi2_cs0_pb7
Bank: 1 Reg: 0x70003074 Val: 0x00006015 -> spi2_cs1_pdd0
Bank: 1 Reg: 0x70003078 Val: 0x0000e015 -> spi4_mosi_pc7
Bank: 1 Reg: 0x7000307c Val: 0x0000e015 -> spi4_miso_pd0
Bank: 1 Reg: 0x70003080 Val: 0x0000e015 -> spi4_sck_pc5
Bank: 1 Reg: 0x70003084 Val: 0x0000e015 -> spi4_cs0_pc6
Bank: 1 Reg: 0x70003088 Val: 0x00002040 -> qspi_sck_pee0
Bank: 1 Reg: 0x7000308c Val: 0x00002000 -> qspi_cs_n_pee1
Bank: 1 Reg: 0x70003090 Val: 0x00002040 -> qspi_io0_pee2
Bank: 1 Reg: 0x70003094 Val: 0x00002040 -> qspi_io1_pee3
Bank: 1 Reg: 0x70003098 Val: 0x00002040 -> qspi_io2_pee4
Bank: 1 Reg: 0x7000309c Val: 0x00002040 -> qspi_io3_pee5
Bank: 0 Reg: 0x70000b70 Val: 0x00000001 -> drive_qspi_comp_control
Bank: 0 Reg: 0x70000b78 Val: 0x00000001 -> drive_qspi_lpbk_control
Bank: 0 Reg: 0x70000a78 Val: 0x00808000 -> drive_qspi_comp
this is the output for sudo cat /sys/kernel/debug/tegra_gpio
on device from Seeed
Name:Bank:Port CNF OE OUT IN INT_STA INT_ENB INT_LVL
A: 0:0 64 40 40 24 00 00 000000
B: 0:1 00 00 00 00 00 00 000000
C: 0:2 00 00 00 00 00 00 000000
D: 0:3 00 00 00 00 00 00 000000
E: 1:0 00 00 00 00 00 00 000000
F: 1:1 00 00 00 00 00 00 000000
G: 1:2 00 00 00 00 00 00 000000
H: 1:3 fd 99 00 60 00 00 000000
I: 2:0 07 07 03 02 00 00 000000
J: 2:1 00 00 00 00 00 00 000000
K: 2:2 00 00 00 00 00 00 000000
L: 2:3 00 00 00 00 00 00 000000
M: 3:0 00 00 00 00 00 00 000000
N: 3:1 00 00 00 00 00 00 000000
O: 3:2 00 00 00 00 00 00 000000
P: 3:3 00 00 00 00 00 00 000000
Q: 4:0 00 00 00 00 00 00 000000
R: 4:1 00 00 00 00 00 00 000000
S: 4:2 80 80 00 00 00 00 000000
T: 4:3 01 01 00 00 00 00 000000
U: 5:0 00 00 00 00 00 00 000000
V: 5:1 02 00 00 02 00 00 000000
W: 5:2 00 00 00 00 00 00 000000
X: 5:3 78 08 08 70 00 60 606000
Y: 6:0 02 00 00 02 00 00 000000
Z: 6:1 0e 08 00 06 00 00 000400
AA: 6:2 00 00 00 00 00 00 000000
BB: 6:3 00 00 00 00 00 00 000000
CC: 7:0 92 80 80 12 00 12 121200
DD: 7:1 00 00 00 00 00 00 000000
EE: 7:2 00 00 00 00 00 00 000000
FF: 7:3 00 00 00 00 00 00 000000
and this is the ouput on Dev Kit device
Name:Bank:Port CNF OE OUT IN INT_STA INT_ENB INT_LVL
A: 0:0 64 40 40 24 00 00 000000
B: 0:1 00 00 00 00 00 00 000000
C: 0:2 00 00 00 00 00 00 000000
D: 0:3 00 00 00 00 00 00 000000
E: 1:0 00 00 00 00 00 00 000000
F: 1:1 00 00 00 00 00 00 000000
G: 1:2 00 00 00 00 00 00 000000
H: 1:3 fd 99 00 60 00 00 000000
I: 2:0 07 07 03 02 00 00 000000
J: 2:1 00 00 00 00 00 00 000000
K: 2:2 00 00 00 00 00 00 000000
L: 2:3 00 00 00 00 00 00 000000
M: 3:0 00 00 00 00 00 00 000000
N: 3:1 00 00 00 00 00 00 000000
O: 3:2 00 00 00 00 00 00 000000
P: 3:3 00 00 00 00 00 00 000000
Q: 4:0 00 00 00 00 00 00 000000
R: 4:1 00 00 00 00 00 00 000000
S: 4:2 80 80 00 00 00 00 000000
T: 4:3 01 01 00 00 00 00 000000
U: 5:0 00 00 00 00 00 00 000000
V: 5:1 02 00 00 02 00 00 000000
W: 5:2 00 00 00 00 00 00 000000
X: 5:3 78 08 08 70 00 60 606000
Y: 6:0 02 00 00 02 00 00 000000
Z: 6:1 0e 08 08 04 00 02 020600
AA: 6:2 00 00 00 00 00 00 000000
BB: 6:3 00 00 00 00 00 00 000000
CC: 7:0 92 80 80 12 00 12 121200
DD: 7:1 00 00 00 00 00 00 000000
EE: 7:2 00 00 00 00 00 00 000000
FF: 7:3 00 00 00 00 00 00 000000
I hope this info helps to investigate more on activating SPI for J101-v2 reComputer. I am out of ideas.