JetPack 6.1 Change Debug UART3 to UART1 on Custom Carrier

I have a custom carrier board that does not have UART3 pins broken out. I need to change the debug console from UART3 to UART1. So far I am able to boot up the module and through tag wires on UART3 verify that the module has booted successfully and talk to it via the serial console.

I have reviewed all available posts regarding this topic, some of which most closely matching my scenario includes:

Please note I have attempted all of the suggested solutions in all of these posts, none of which works.
Would an employee please provide step by step instructions as to how to accomplish this?

I think UART1 is enabled:

$ sudo dmesg | grep "serial"
[    0.148537] 31d0000.serial: ttyAMA0 at MMIO 0x31d0000 (irq = 118, base_baud = 0) is a SBSA
[    0.280606] msm_serial: driver initialized
[    4.144828] serial-tegra 3100000.serial: RX in PIO mode
[    4.144834] serial-tegra 3100000.serial: TX in PIO mode
[    4.144954] 3100000.serial: ttyTHS1 at MMIO 0x3100000 (irq = 112, base_baud = 0) is a TEGRA_UART
[    4.146892] serial-tegra 3110000.serial: RX in PIO mode
[    4.146899] serial-tegra 3110000.serial: TX in PIO mode
[    4.146991] 3110000.serial: ttyTHS2 at MMIO 0x3110000 (irq = 206, base_baud = 0) is a TEGRA_UART
[    9.346377] systemd[1]: Created slice Slice /system/serial-getty.

But why is UART1 (serial@3100000) mapped to ttyTHS1? In the wiki it’s mapped to ttyTHS0.

@KevinFFF

@KevinFFF

You mention here the UART mapping is different between JP5 and JP6, but I cannot find the mapping for JP6 on any nvidia documentation, JP release notes, or forum posts. Why is this information obscured? What needs to be changed for JP6 that’s different than the previous posts that worked for JP5?

In the final dtb on the orin agx module I have the alias for UART1:

 aliases {
        mmc0 = "/bus@0/mmc@3460000";
        mmc1 = "/bus@0/mmc@3400000";
        serial0 = "/serial";
        serial1 = "/bus@0/serial@3100000";
        i2c0 = "/bus@0/i2c@3160000";
        i2c1 = "/bus@0/i2c@c240000";
        i2c2 = "/bus@0/i2c@3180000";
        i2c3 = "/bus@0/i2c@3190000";
        i2c4 = "/bpmp/i2c";
        i2c5 = "/bus@0/i2c@31b0000";
        i2c6 = "/bus@0/i2c@31c0000";
        i2c7 = "/bus@0/i2c@c250000";
        i2c8 = "/bus@0/i2c@31e0000";
        qspi0 = "/bus@0/spi@3270000";
        rtc0 = "/bpmp/i2c/vrs@3c";
        rtc1 = "/bus@0/rtc@c2a0000";
        nvdla0 = "/bus@0/host1x@13e00000/nvdla0@15880000";
        nvdla1 = "/bus@0/host1x@13e00000/nvdla1@158c0000";
        tegra-camera-rtcpu = "/rtcpu@bc00000";
        serial2 = "/bus@0/serial@3110000";
};

Under symbols, it’s listed as:

uarta = "/bus@0/serial@3100000";

The serial node itself is:

 serial@3100000 {
        compatible = "nvidia,tegra194-hsuart";
        reg = <0x00 0x3100000 0x00 0x10000>;
        interrupts = <0x00 0x70 0x04>;
        clocks = <0x03 0x9b>;
        resets = <0x03 0x64>;
        status = "okay";
        reset-names = "serial";
        phandle = <0x230>;
};

What are the options for the “compatible” parameter under this serial node? What is tegra194-hsuart and why do some of the posts for JP5 require it changed to tegra20-uart?

@KevinFFF

Performing loopback test on the SoM UART1 (ttyTHS1) works:

$ sudo su
# stty -F /dev/ttyTHS1 115200 raw -echo
# cat /dev/ttyTHS1 &
# echo "test" > /dev/ttyTHS1

I can see it being written back and observe signal on scope. However, I’m not able to get console on that UART still.

dmesgt shows this:

$ dmesg | grep tty
[    0.000000] Kernel command line: root=/dev/mmcblk0p1 rw rootwait rootfstype=ext4 mminit_loglevel=4 console=ttyTHS0,115200 console=ttyTCU0,115200 console=ttyAMA0,115200 firmware_class.path=/etc/firmware fbcon=map:0 nospectre_bhb video=efifb:off console=tty0 bl_prof_dataptr=2031616@0x102C610000 bl_prof_ro_ptr=65536@0x102C600000
[    0.000645] printk: console [tty0] enabled
[    0.148530] 31d0000.serial: ttyAMA0 at MMIO 0x31d0000 (irq = 118, base_baud = 0) is a SBSA
[    0.148574] printk: console [ttyAMA0] enabled
[    0.282435] printk: console [ttyTCU0] enabled
[    1.883642] printk: console [tty0]: printing thread started
[    1.884342] printk: console [ttyTCU0]: printing thread started
[    1.885502] printk: console [ttyAMA0]: printing thread started
[    1.987529] 3100000.serial: ttyTHS1 at MMIO 0x3100000 (irq = 112, base_baud = 0) is a TEGRA_UART
[    1.989556] 3110000.serial: ttyTHS2 at MMIO 0x3110000 (irq = 206, base_baud = 0) is a TEGRA_UART

Here’s the full log:
dmesg.log (72.6 KB)

Can someone please answer my question

The result from the wiki is for Jetpack 5 (r35.x) and it seems you are using Jetpack 6.1
Please share the result of the following commands on your board.

$ cat /etc/nv_boot_control.conf
$ cat /etc/nv_tegra_release

If you’ve referred to those threads, you would know that the mapping could be configured through aliases in device tree.

They are just different serial drivers and you can select either of them for your use case.

It seems you want to re-direct the serial console to uarta(serial@3100000).
Please refer to the steps in Custom carrier board debugging/not booting - #14 by KevinFFF but modify for the one you are using(serial@3100000) since that one is verified on JP5.x before.

Yes, I’m running JP 6.1. Here’s the output from those files:

acs@motherboard:~$ cat /etc/nv_boot_control.conf
TNSPEC 3701-501-0005-G.0-1-1-jetson-agx-orin-devkit-
COMPATIBLE_SPEC 3701--0005--1--jetson-agx-orin-devkit-
TEGRA_BOOT_STORAGE mmcblk0
TEGRA_CHIPID 0x23
TEGRA_OTA_BOOT_DEVICE /dev/mtdblock0
TEGRA_OTA_GPT_DEVICE /dev/mtdblock0


acs@motherboard:~$ cat /etc/nv_tegra_release
# R36 (release), REVISION: 4.0, GCID: 37537400, BOARD: generic, EABI: aarch64, DATE: Fri Sep 13 04:36:44 UTC 2024
# KERNEL_VARIANT: oot
TARGET_USERSPACE_LIB_DIR=nvidia
TARGET_USERSPACE_LIB_DIR_PATH=usr/lib/aarch64-linux-gnu/nvidia

I’ve looked through the device tree source files but only found these aliases in tegra234-p3737-0000+p3701-0000.dts:

aliases {
    serial0 = &tcu;
    serial1 = &uarta;
};

chosen {
    bootargs = "console=ttyTCU0,115200n8";
    stdout-path = "serial0:115200n8";
};

Which look to correspond with UART3(?) and UART1(?) on the SoM respectively. Where are the aliases for the other 3 UARTs? Where can I find documentation for the SoM UARTs’ unit addresses if it’s different than JP 5.x wiki?

I’ve previously tried this suggested solution and followed the first step:

But the following steps look to be editing a decompiled device trees:

I’d like to edit the source files instead and select the compiled .dtbs with a custom conf when flashing. Which .dtsi source files should I edit? I don’t see those two source files in /Linux_for_Tegra/source/hardware/nvidia/t23x/nv-public.

I’ve also tried those same steps but for UART1 (uarta, 3100000):

Where uarta was already present and I copied the same register values and it did not work. Boot console was still on UART3. Do those register values need to be changed for JP 6.1?

You have to add them back since they are removed in JP6 by default.

Please try to edit nv-platform/tegra234-p3768-0000+p3767-xxxx-nv-common.dtsi in the source of JP6.x.

If you want to use UART1 to output log and uarta has been added here, then you can ignore the modification in bpmp-dtb.