Jetson AGX Orin not booting on custom carrier board

Autonomous Machines Jetson & Embedded Systems Jetson AGX Orin
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9

Do you mean the debug UART not present on your custom carrier board?

yes, the debug UART isn’t present.

What’s the UART2 you mean?

yes, the SOM module UART2 that in our carrier it’s directly connected to a header without any debug MCU in the middle.

For what concern the

Custom carrier board debugging/not booting - #14 by KevinFFF

i need some help, i will follow this steps, correct me if some step is wrong, and answer to my doubts:

Step 1) i need to change the Linux_for_Tegra/p3701.conf.common in this part of code instead of ttyS1 should i write ttyS4 or ttyHS4 as shown in Jetson/L4T/peripheral/ - eLinux.org?

+CMDLINE_ADD=“mminit_loglevel=4 console=ttyS1,115200 console=ttyTCU0,115200 console=ttyAMA0,115200 console=tty0 firmware_class.path=/etc/firmware fbcon=map:0 net.ifnames=0”

Step 2)

Step 2: Dissemble the “tegra234-p3701-0000-p3737-0000.dtb” dtb to dts
dtc -I dtb -O dts -o temp.dts tegra234-p3701-0000-p3737-0000.dtb
Step 3: Modify the content in temp.dts

for my specific case i should replace 3110000 to 3140000? or something else should be changed?

  serial@3110000 {
-compatible = "nvidia,tegra194-hsuart";
+compatible = "nvidia,tegra20-uart";
            iommus = <0x2 0x4>;
            dma-coherent;
            reg = <0x0 0x3110000 0x0 0x10000>;
            reg-shift = <0x2>;
            interrupts = <0x0 0x71 0x4>;
            nvidia,memory-clients = <0xe>;
            dmas = <0x3 0x9 0x3 0x9>;
            dma-names = "rx", "tx";
            clocks = <0x4 0x9c 0x4 0x66>;
            clock-names = "serial", "parent";
            resets = <0x4 0x65>;
            reset-names = "serial";
            status = "okay";
            phandle = <0x320>;
    };

then if i’m not wrong also tegra234-bpmp-3701-0000-3737-0000.dtb should be disassembled the same as “tegra234-p3701-0000-p3737-0000.dtb” and change the Device tree for bpmp as follow replacing uartb with uarte for my specific case. The values remains the same or should i change somithing else?

		init {
			nafll_bpmp = <0xc5 0x0 0xc350000 0x0>;
			nafll_seu1 = <0x14f 0x0 0x1c3a9000 0x0>;
			bpmp_cpu_nic = <0x133 0xc5 0x0 0x0>;
			fr_seu1 = <0x14b 0x14f 0x0 0x0>;
			i2c_slow = <0x8a 0x121 0xffffffff 0x0>;
			aon_i2c_slow = <0x75 0x121 0xffffffff 0x0>;
			tach0 = <0x98 0xe 0x30d400 0x0>;
			tach1 = <0x16d 0xe 0x30d400 0x0>;
			i2c1 = <0x30 0x0 0x0 0x2>;
			qspi0_2x_pm = <0xc0 0x0 0x0 0x2>;
			sdmmc4 = <0x7b 0x0 0x0 0x2>;
			seu1 = <0x150 0x0 0x0 0x8>;
			uartc = <0x9d 0x0 0x0 0x8>;
			uarta = <0x9b 0x66 0x1c1b40 0x8>;
+			uartb = <0x9c 0x66 0x1c1b40 0x8>;
			pllref_vcoout = <0x120 0x0 0x0 0xa>;
			eqos_tx_divider = <0x19f 0x0 0xffffffff 0x0>;
			eqos_axi = <0x20 0x0 0x7735940 0x2>;
			eqos_tx = <0x23 0x0 0x0 0x2>;
			eqos_macsec_tx = <0x19e 0x0 0x0 0x2>;
			eqos_ptp_ref = <0x21 0x0 0xffffffff 0x2>;
		};

Step 3)

Assemble the dts back to dtb for both the files, right?

dtc -I dts -O dtb -o tegra234-p3701-0000-p3737-0000.dtb temp.dts
dtc -I dts -O dtb -o tegra234-bpmp-3701-0000-3737-0000.dtb temp2.dts

Step 4)
i have now all the file modified in the Linux_for_tegra folder. then i must run

sudo ./apply_binaries.sh

and then i can flash with

sudo ./flash.sh jetson-agx-orin-devkit mmcblk0p1

is this procedure enough?

EXTRA POINT) Finally, I’ve one doubt. I saw in another thread (How to enable UART?) that in the file “tegra234-cvm-p3701.dtsi” the uart should be “okay” and not “disabled”. As default in JetPack 5.1.3 the serial@3140000 seems disabled. The previous steps automatically change this field, or should i change also this file before the Step 4?

Then i think we should do also what @D3_jshaffer said, but for the moment i would be happy to see serial log.
I thank you both for the help, and i wait for some confirms.
Best Regards