How to enable UART?

[kcs]

Hi, nvidia teams.
We use AGX ORIN with custom board JETPACK 6.1(rel36.4).
We want to enable UART1(serial@3100000, ttyTHS0), UART2(serial@3140000, ttyTHS4) and UART4(serial@3130000, ttyTHS3).

It was easy to enable in JETPACK 5.1.3(rel35.5.0).

just modify status = “disabled” → status = “okay”.

However, it is difficult to enable UART1, UART2, and UART4 after updating to JETPACK 6.1.
Which dts file should I modify to enable UARTs?

** When I flash as an nvidia official jetpack image, only ttyTHS1 and ttyTHS2 are active.

Thanks.

[carolyuu]

Hi,
Here are some suggestions for the common issues:

1. Performance

Please run the below command before benchmarking deep learning use case:

$ sudo nvpmodel -m 0
$ sudo jetson_clocks

2. Installation

Installation guide of deep learning frameworks on Jetson:

• TensorFlow: Installing TensorFlow for Jetson Platform - NVIDIA Docs
• PyTorch: Installing PyTorch for Jetson Platform - NVIDIA Docs
  We also have containers that have frameworks preinstalled:
  Data Science, Machine Learning, AI, HPC Containers | NVIDIA NGC

3. Tutorial

Startup deep learning tutorial:

• Jetson-inference: Hello AI World guide to deploying deep-learning inference networks and deep vision primitives with TensorRT and NVIDIA Jetson
• TensorRT sample: Jetson/L4T/TRT Customized Example - eLinux.org

4. Report issue

If these suggestions don’t help and you want to report an issue to us, please attach the model, command/step, and the customized app (if any) with us to reproduce locally.

Thanks!

[kcs]

Hi carolyuu,
I didn’t ask questions about deep learning.

[KevinFFF]

Hi kcs,

Some nodes have been removed in device tree of JP6.
Please provide the full dmesg and device tree for further check.

You can run the following command on your board to get the device tree.

$ sudo dtc -I fs -O dts -o extracted_proc.dts /proc/device-tree

[kcs]

Hi Kevin,

dmesg
dmesg.txt (60.5 KB)
device tree
extracted_proc.zip (46.0 KB)

Thanks.

[KevinFFF]

[    3.994109] 3100000.serial: ttyTHS1 at MMIO 0x3100000 (irq = 112, base_baud = 0) is a TEGRA_UART
[    3.994548] 3110000.serial: ttyTHS2 at MMIO 0x3110000 (irq = 206, base_baud = 0) is a TEGRA_UART

There’re 2 UART interfaces enabled.

@kcs

UART1(serial@3100000, ttyTHS0), UART2(serial@3140000, ttyTHS4) and UART4(serial@3130000, ttyTHS3).

As a result, UART1 has been enabled.

For UART2, please decompile /boot/dtb/kernel_XXX.dtb and modify the following lines:

		serial@3140000 {
			resets = <0x03 0x68>;
			interrupts = <0x00 0x74 0x04>;
			clocks = <0x03 0x9f>;
			dma-names = "rx\0tx";
			compatible = "nvidia,tegra234-uart\0nvidia,tegra20-uart";
-			status = "disabled";
+			status = "okay";
			reg = <0x00 0x3140000 0x00 0x10000>;
			phandle = <0x241>;
			dmas = <0xee 0x14 0xee 0x14>;
		};
..
	aliases {
		i2c3 = "/bus@0/i2c@3190000";
		nvdla1 = "/bus@0/host1x@13e00000/nvdla1@158c0000";
		i2c1 = "/bus@0/i2c@c240000";
		mmc1 = "/bus@0/mmc@3400000";
		i2c8 = "/bus@0/i2c@31e0000";
		i2c6 = "/bus@0/i2c@31c0000";
		serial1 = "/bus@0/serial@3100000";
+		serial3 = "/bus@0/serial@3140000";
		tegra-camera-rtcpu = "/rtcpu@bc00000";
..

Similar steps to enable UART4(serial@3130000).

If you want to modify them in source and recompile kernel image/dtb.
You can modify them in tegra234-p3737-0000+p3701-xxxx-nv-common.dtsi for AGX Orin.

[kcs]

Hi Kevin,

thanks for supporting. we solve this problem.
now, UART2 and UART4 are enabled.