Continuing the discussion from Enabling the correct UARTs on the Orin NX:
and [OrinNX : How to check UART is working?]
We have a custom carrier board for Jetson Orin Nano SoM. We require UART0 and UART1 to be used as general purpose UARTs and UART2 as console UART.
We were able to use UART1 using the device node /dev/ttyTHS0.
UART2 is also working as console.
But we weren’t able to connect with UART0.
Output of the command sudo dmesg | grep tty is given below:
[ 0.000000] Kernel command line: root=PARTUUID=d5d74128-4329-443f-8fbd-2964fd0a3967 rw rootwait rootfstype=ext4 mminit_loglevel=4 console=ttyTCU0,115200 console=ttyAMA0,115200 firmware_class.path=/etc/firmware fbcon=map:0 net.ifnames=0 nospectre_bhb nv-auto-config
[ 0.242156] 31d0000.serial: ttyAMA0 at MMIO 0x31d0000 (irq = 65, base_baud = 0) is a SBSA
[ 1.388982] printk: console [ttyAMA0] enabled
[ 4.005970] printk: console [ttyTCU0] enabled
[ 6.988540] 3100000.serial: ttyTHS0 at MMIO 0x3100000 (irq = 17, base_baud = 0) is a TEGRA_UART
[ 7.005001] 3130000.serial: ttyTHS3 at MMIO 0x3130000 (irq = 63, base_baud = 0) is a TEGRA_UART
[ 7.021473] 3140000.serial: ttyTHS4 at MMIO 0x3140000 (irq = 64, base_baud = 0) is a TEGRA_UART
[ 12.005810] systemd: Created slice system-serial\x2dgetty.slice.
/dev/ttyTHS1 which maps to UART0 has not been enabled by the kernel device tree.
We assume UART0 has been locked for Bluetooth usage.
But /dev/ttyTHS3 and /dev/ttyTHS4 are available as device nodes. Do they map to UART D and UART E?
If so, what are the pin outs? Any pinmux corrections required?
Our project requires 2 general purpose UARTs in addition to the console UART. UART2 as console and UART1 as general purpose UART is already working. We require one more.
Any help is welcome.
What’s you Jetpack version in use?
Please refer to the following thread about the UART mapping for Orin NX.
OrinNX : How to check UART is working? - #3 by KevinFFF
UART0 should be connected from M.2 Key E, have you connect them on the custom board to your UART device already?
Please just enable it from the dtb in use.
Thanks for your reply.
Jetpack version is 5.1.2-b104
Yes, we have already connected UART0 from M.2 Key E.
How to enable it in dtb? Could you guide with the steps required? Does this require kernel source compilation?
Please share the dmesg and the
/boot/dtb/kernel_XXX.dtb from your board for further check.
The files are attached.
dmesg.txt (64.6 KB)
(Attachment kernel_tegra234-p3767-0004-p3768-0000-a0.dtb is missing)
kernel_tegra234-p3767-0004-p3768-0000-a0.txt (339.4 KB)
I cannot attach dtb files here. So just changed the extension to txt. The file content is exact.
UART0 => UART2(PX04, PX05, PX06, PX07): uartb@3110000 (serial1) - Unused => To M.2 Key E
For UART0, you should enable the
uartb - serial@3110000 node in device tree.
compatible = "nvidia,tegra194-hsuart";
iommus = <0x6 0x4>;
reg = <0x0 0x3110000 0x0 0x10000>;
reg-shift = <0x2>;
interrupts = <0x0 0x71 0x4>;
nvidia,memory-clients = <0xe>;
dmas = <0x3f 0x9 0x3f 0x9>;
dma-names = "rx", "tx";
clocks = <0x2 0x9c 0x2 0x66>;
clock-names = "serial", "parent";
resets = <0x2 0x65>;
reset-names = "serial";
- status = "disabled";
- status = "okay";
phandle = <0x2ff>;
after enabling this node, you should see
/dev/ttyTHS1 in dmesg during boot up.
How to do it? Could you please provide a link for the procedures?
Let me provide brief steps for this…
Please refer to the following steps in your board
1. Decompile dtb to dts
$ dtc -I dtb -O dts -o temp.dts kernel_tegra234-p3767-0004-p3768-0000-a0.dtb
2. Modify the contents I shared in previous response
3. Assemble dts back to dtb
$ dtc -I dts -O dtb -o kernel_tegra234-p3767-0004-p3768-0000-a0.dtb temp.dts
Your solution works. Problem solved. /dev/ttyTHS1 is showing in device nodes. UART0 is working.