Lost instance of UART3 in JetPack 6 for the AGX Orin board

Hi everyone,

I am interested in changing the UART debug port for the AGX Orin board. From what I’ve read in the Jetson AGX Orin Product Design Guide and the following Unable to correspond to "func" and "uart_tx" - #3 by KevinFFF Agx orin module can't use uart 3/4/5, the UART3 is the debug port. This port is related to the following information in the device tree for the JetPack 5 sources:

  • UART3(PCC05, PCC06): uartc@c280000 (serial2) - /dev/ttyTCU0

the instance from the serial@c280000 exists in the JetPack 5 sources. However, I did not see any serial@c280000 instance in the JetPack 6 sources.

Furthermore, I got the serial debug log (find attached at the of the post) from an AGX Orin board flashed with JetPack 5 and I noticed the serials ports that I saw in the log are:

[    0.136363] 31d0000.serial: ttyAMA0 at MMIO 0x31d0000 (irq = 118, base_baud = 0) is a SBSA

[    2.031917] serial-tegra 3100000.serial: RX in PIO mode
[    2.031922] serial-tegra 3100000.serial: TX in PIO mode
[    2.032043] 3100000.serial: ttyTHS1 at MMIO 0x3100000 (irq = 112, base_baud = 0) is a TEGRA_UART
[    2.033370] serial-tegra 3110000.serial: RX in PIO mode
[    2.033373] serial-tegra 3110000.serial: TX in PIO mode
[    2.035692] 3110000.serial: ttyTHS2 at MMIO 0x3110000 (irq = 207, base_baud = 0) is a TEGRA_UART

I understood that the serial ports 3100000 and 3110000 are associated with the UART1(uarta) and UART2(uartb). However, there is no reference to the c280000 port, the UART3(uartc) port, which is confusing.

In the JetPack 6 sources, I found that the 3100000 and 3110000 instances are in the following files:

  • For 3100000 UART1(uarta) port → hardware/nvidia/t23x/nv-public/tegra234.dtsi and hardware/nvidia/t23x/nv-public/tegra234-p3737-0000+p3701-0000.dts
  • For 3110000 UART2(uartb) port → hardware/nvidia/t23x/nv-public/nv-platform/tegra234-p3737-0000+p3701-xxxx-nv-common.dtsi and hardware/nvidia/t23x/nv-public/nv-soc/tegra234-soc-overlay.dtsi

but, as I already mentioned, I did not find any instance of the serial@c280000 UART3 port.

Questions for the NVIDIA team

  1. Could you please clarify the instance loss of the serial@c280000 UART 3 port in the JetPack 6 sources?
  2. Could I use the serial@c280000 instance in the soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-uart.dtsi JetPack 5 sources file to enable the UART 3 port in JetPack 6?

I appreciate any help you can provide.

uart_jp5_log.txt (37.2 KB)

Hi EduardoSalazar96,

Jetpack 5 and 6 have different stacks for device tree and we also modify few nodes for serial devices.

Actually, serial@c280000 is used for serial device rather than TCU(Tegra Combined Uart) for debug console.
We don’t want customer use this interface for other use case so that we remove it from device tree.

As I mentioned above, we don’t suggest user using this interface for the purpose other than debug console. Please just keep as it is. In addition, I think you should refer to the t23x for your AGX Orin. (rather than t19x)

Hi @KevinFFF

Thank your reply!

I understood the UART3/C is only for debugging purposes.

In fact, that port is what we are using for. However, we are exploring customizing the debug UART interface at the hardware level from the development kit design found in the NVIDIA Jetson AGX Orin Developer Kit Carrier Board Specification:


to the following Planned Design:

We already tested the Planned Design, but we got output messages very different from the devkit UART debug port output. That is the reason why we wanted to check the UART3 port instance in the JetPack 6 sources device tree.

Please, check the following debug files so you can see the differences:

serial_port_debug_files.zip (27.5 KB)

Questions for the NVIDIA team

  1. According to the planned design, could we see the same output as when we use the devkit serial port?
  2. I understand that the UART3 device tree instance should not be changed in the device tree, but according to the planned design, should we keep the instance as is too?
  3. Are the Debug MCU and Level Shifters needed? Or could we replace them with the USB to UART FT232RNQ chip and get the same results?

Maybe you should share the schematic for our HW team to review if they are good to use.

As I stated before, we don’t suggest customer modify the architecture or any configurations in device tree for UART3. Just keep it working as debug UART with default configurations.

Same as above, please share the schematic for our HW team to review.

C> Task 0x0 failed (err: 0x1f1e050d)
E> Top caller module: I2C_DEV, error module: I2C, reason: 0x0d, aux_info: 0x05
I> Busy Sp▒n
[0000.064] I> MB1 (version:

From your Custom_AGX_SerialCOM_20240603_163014.rtf, it seems boot failed in MB2 with above errors so that it reset the board.
Do you have EEPROM on your custom board?