Jetson AGX Orin PCIe Rootport <-> Endpoint Pin connection


I am confusing PCIe pin connection from AGX Orin product design guide.

I think the module pin name for root-port side has switched.
Please, let me know the design guide is correct or not.

Yes, it is doc issue that will be corrected in future release. Please refer to the SoC pin names.

1 Like

This topic was automatically closed 14 days after the last reply. New replies are no longer allowed.