Jetson AGX Orin RGMII Bring-up: MxL86111 PHY Strap Pins (CFG_MODE[2:0]) Wrong After Kernel PHY Reset

Robotics & Edge Computing Jetson Systems Jetson AGX Orin
1

Hello, I’m trying to activate the RGMII interface for my AGX ORIN custom carrier

. I’m using an Ethernet chip, the PHY MxL86111, but I’m having trouble with the configuration.

When the agx orin kernel starts, the logs show a “Failed to poll MAC Software reset” error, keeping the PHY in reset mode, preventing my MDI connection.

To disable this error, I made changes in core_common.c and prevented it from staying in reset state.

After that, I was able to access the PHY chip via MDI and Phytool. I can identify the problem here.

the MxL86111 initially requests a reset trigger and then, while in reset state, reads whether the relevant pins are pulled up or pulled down using pin strapping, and configures its internal settings accordingly. Here is my hardware configuration:

My RD0/RXDLY pin does not contain any pull-up or pull-down resistors.

RXD1/CFG_MODE0 has a external pull-down resistor,
RXD2/CFG_MODE1 has a external pull-down resistor,
and RXD3/CFG_MODE2 has a external pull-down resistor.

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When I read this register with MDIO, the value I get is 0x8147 in binary form (0b1000000101000111), so the problem seems to be here.

We can see that the last bits need to be 000 for UTP to rgmii, but there’s an error here.

it supposed to be 0b1000000111100000
I changed this via MDIO ,I applied write in phytool , but I think it’s ignoring my correction because it didn’t initially appear in the kernel as rgmii.

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I’m configuring the agx orin pinmux like this:

Req. Initial State is working as it should.

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At first I suspected Req.InitialState, but I realized it wasn’t related; it determines the pin states before the kernel starts.

I’m sure I’ve applied the changes visible in Pinmux
—the problem is that after the kernel starts and sends a phy reset, these pins appear as active high, and it messes up my configuration. How can I fix this?

So how can I set the states of the relevant pins the moment the kernel starts up?

4

Are you saying that setting active low might help to your problem?

5

I didn’t quite understand what you meant; the summarize function summarizes it quite well.

6

You mentioned above item. So I would like to know if you expect us to help you set it to active low?

Or you are talking about something else?

7

Even if I set the req init function to active low, when I read the registers via MDIO later, I get different values, so this isn’t helping.

8

Active low is configured in the kernel device tree. Pinmux does not really change active low/high.

It only gives pull up/low default state.