Jetson Nano production module possible HDMI pin mismatch in documentation

I am comparing two documents

Screenshot: https://ibb.co/d4zHjjK

On the page 26, there is a section for diff lines DP1_TXD0 to DP1_TXD2 with note in rightmost column:

DP1_TXD2_[P,N] = HDMI Lane 0
DP1_TXD1_[P,N] = HDMI Lane 1
DP1_TXD0_[P,N] = HDMI Lane 2

Screenshot: https://ibb.co/MNshyJC

On the sheet “Jetson_Nano_Module”, in the HDMI rows (302 - 310), Jetson Nano Signal Name to Ball Name for pins are stated:

DP1_TXD0_P - 65 - HDMI_DP_TXDP0
DP1_TXD0_N - 63 - HDMI_DP_TXDN0

DP1_TXD1_P - 71 - HDMI_DP_TXDP1
DP1_TXD1_N - 69 - HDMI_DP_TXDN1
DP1_TXD2_P - 77 - HDMI_DP_TXDP2
DP1_TXD2_N - 75 - HDMI_DP_TXDN2

DP1_TXD3_P - 83 - HDMI_DP_TXDP3
DP1_TXD3_N - 81 - HDMI_DP_TXDN3

So, in Data Sheet, DP lane 0 corresponds to HDMI lane 2, and vice versa, while in Pinmux, DP lane 0 corresponds to HDMI lane 0

As far as testing goes, I believe that Data Sheet is in the right, so this holds true:
DP1_TXD2_[P,N] = HDMI Lane 0
DP1_TXD1_[P,N] = HDMI Lane 1
DP1_TXD0_[P,N] = HDMI Lane 2

I would like just some feedback, and to have confirmation about this.

With kind regards,
Ante

Hi,

Both document are correct.

DP1_TXD*_[P,N] in Datasheet and pinmux is module pin name.
HDMI_DP_TXDP* in pinmux is SOC ball name.
“DP1_TXD0_P - 65 - HDMI_DP_TXDP0” is just a mapping between module pin and SOC ball, not HDMI/DP lane matching.

HDMI and DP lane sequence are different, please check https://developer.nvidia.com/embedded/dlc/jetson-nano-product-design-guide, Table 30. DP/HDMI Pin Mapping.
Also can refer https://developer.nvidia.com/embedded/dlc/Jetson-Nano-Carrier-Board-Reference-Design-Files about how to connect HDMI or DP.