cmd:
sudo BOARDID=3767 BOARDSKU=0003 ./tools/kernel_flash/l4t_initrd_flash.sh \
--flash-only --network usb0 --massflash 5 \
jetson-orin-nano-devkit-nvme internal
File to be written cannot be of zero size, pFileName=qspi_bootblob_ver.txt
hello edgar_xia,
please refer to [Workflow 7: Initrd Massflash] from… $OUT/Linux_for_Tegra/tools/kernel_flash/README_initrd_flash.txt
since you’ve given --massflash 5 options, please confirm you have connect all 5 Jetson devices to the flashing hosts, and they’re in exactly the same hardware revision, in addition, you’ve also put all of connected Jetson platforms into RCM mode.
the massflash can not boot-up;
The Uart Log:
??[0010.142] I> MB1 (version: 1.4.0.1-t234-54845784-08e631ca)
[0010.147] I> t234-A01-1-Silicon (0x12347) Prod
[0010.152] I> Boot-mode : Coldboot
[0010.155] I> Entry timestamp: 0x00000000
[0010.159] I> last_boot_error: 0x0
[0010.162] I> BR-BCT: preprod_dev_sign: 0
[0010.166] I> rst_source: 0x0, rst_level: 0x0
[0010.170] I> Task: SE error check
[0010.173] I> Task: Bootchain select WAR set
[0010.177] I> Task: Enable SLCG
[0010.180] I> Task: CRC check
[0010.183] I> Task: Initialize MB2 params
[0010.187] I> MB2-params @ 0x40060000
[0010.190] I> Task: Crypto init
[0010.193] I> Task: Perform MB1 KAT tests
[0010.197] I> Task: NVRNG health check
[0010.201] I> NVRNG: Health check success
[0010.204] I> Task: MSS Bandwidth limiter settings for iGPU clients
[0010.210] I> Task: Enabling and initialization of Bandwidth limiter
[0010.217] I> No request to configure MBWT settings for any PC!
[0010.222] I> Task: Secure debug controls
[0010.226] I> Task: strap war set
[0010.229] I> Task: Initialize SOC Therm
[0010.233] I> Task: Program NV master stream id
[0010.237] I> Task: Verify boot mode
[0010.243] I> Task: Alias fuses
[0010.246] W> FUSE_ALIAS: Fuse alias on production fused part is not supported.
[0010.253] I> Task: Print SKU type
[0010.256] I> FUSE_OPT_CCPLEX_CLUSTER_DISABLE = 0x000001c8
[0010.262] I> FUSE_OPT_GPC_DISABLE = 0x00000002
[0010.266] I> FUSE_OPT_TPC_DISABLE = 0x000000f0
[0010.270] I> FUSE_OPT_DLA_DISABLE = 0x00000003
[0010.274] I> FUSE_OPT_PVA_DISABLE = 0x00000001
[0010.279] I> FUSE_OPT_NVENC_DISABLE = 0x00000001
[0010.283] I> FUSE_OPT_NVDEC_DISABLE = 0x00000000
[0010.288] I> FUSE_OPT_FSI_DISABLE = 0x00000001
[0010.292] I> FUSE_OPT_EMC_DISABLE = 0x0000000c
[0010.296] I> FUSE_BOOTROM_PATCH_VERSION = 0x7
[0010.300] I> FUSE_PSCROM_PATCH_VERSION = 0x7
[0010.305] I> FUSE_OPT_ADC_CAL_FUSE_REV = 0x2
[0010.309] I> FUSE_SKU_INFO_0 = 0xd5
[0010.312] I> FUSE_OPT_SAMPLE_TYPE_0 = 0x3 PS
[0010.316] I> FUSE_PACKAGE_INFO_0 = 0x2
[0010.320] I> SKU: Prod
[0010.322] I> Task: Boost clocks
[0010.325] I> Initializing PLLC2 for AXI_CBB.
[0010.329] I> AXI_CBB : src = 35, divisor = 0
[0010.333] I> Task: Voltage monitor
[0010.337] I> VMON: Vmon re-calibration and fine tuning done
[0010.342] I> Task: UPHY init
[0010.347] I> HSIO UPHY init done
[0010.350] W> Skipping GBE UPHY config
[0010.353] I> Task: Boot device init
[0010.357] I> Boot_device: RCM
[0010.360] I> USB configuration success
[0010.438] I> Task: TSC init
[0010.440] I> Task: Load membct
[0010.443] I> RAM_CODE 0x4000021
[0010.446] I> Loading MEMBCT
[0010.449] I> Slot: 0
[0010.451] I> Binary[0] block-0 (partition size: 0x40000)
[0010.456] I> Binary name: MEM-BCT-0
[0010.460] I> Size of crypto header is 8192
[0010.464] I> Size of crypto header is 8192
[0010.468] I> BCH of MEM-BCT-0 read from storage
[0010.472] I> BCH address is : 0x40050000
[0010.476] I> MEM-BCT-0 header integrity check is success
[0010.481] I> Binary magic in BCH component 0 is MEM0
[0010.486] I> component binary type is 0
[0010.496] I> MEM-BCT-0 binary is read from storage
[0010.501] I> MEM-BCT-0 binary integrity check is success
[0010.506] I> Binary MEM-BCT-0 loaded successfully at 0x40040000 (0xe580)
[0010.513] I> RAM_CODE 0x4000021
[0010.518] I> RAM_CODE 0x4000021
[0010.522] I> Task: Load Page retirement list
[0010.526] I> Task: SDRAM params override
[0010.530] I> Task: Save mem-bct info
[0010.533] I> Task: Carveout allocate
[0010.537] I> Update CCPLEX IST carveout from MB1-BCT
[0010.542] I> ECC region[0]: Start:0x0, End:0x0
[0010.546] I> ECC region[1]: Start:0x0, End:0x0
[0010.550] I> ECC region[2]: Start:0x0, End:0x0
[0010.555] I> ECC region[3]: Start:0x0, End:0x0
[0010.559] I> ECC region[4]: Start:0x0, End:0x0
[0010.563] I> Non-ECC region[0]: Start:0x80000000, End:0x280000000
[0010.569] I> Non-ECC region[1]: Start:0x0, End:0x0
[0010.574] I> Non-ECC region[2]: Start:0x0, End:0x0
[0010.578] I> Non-ECC region[3]: Start:0x0, End:0x0
[0010.583] I> Non-ECC region[4]: Start:0x0, End:0x0
[0010.594] I> allocated(CO:43) base:0x27c000000 size:0x4000000 align: 0x200000
[0010.601] I> allocated(CO:39) base:0x279e00000 size:0x2200000 align: 0x10000
[0010.608] I> allocated(CO:20) base:0x276000000 size:0x2000000 align: 0x2000000
[0010.615] I> allocated(CO:24) base:0x274000000 size:0x2000000 align: 0x2000000
[0010.622] I> allocated(CO:28) base:0x272000000 size:0x2000000 align: 0x2000000
[0010.629] I> allocated(CO:22) base:0x278000000 size:0x1000000 align: 0x1000000
[0010.636] I> allocated(CO:35) base:0x279000000 size:0xe00000 align: 0x10000
[0010.643] I> allocated(CO:02) base:0x271800000 size:0x800000 align: 0x800000
[0010.650] I> allocated(CO:03) base:0x271000000 size:0x800000 align: 0x800000
[0010.657] I> allocated(CO:06) base:0x270800000 size:0x800000 align: 0x800000
[0010.664] I> allocated(CO:56) base:0x270000000 size:0x800000 align: 0x200000
[0010.671] I> allocated(CO:07) base:0x26fc00000 size:0x400000 align: 0x400000
[0010.678] I> allocated(CO:33) base:0x26f800000 size:0x400000 align: 0x200000
[0010.685] I> allocated(CO:23) base:0x26f600000 size:0x200000 align: 0x200000
[0010.692] I> allocated(CO:01) base:0x26f500000 size:0x100000 align: 0x100000
[0010.698] I> allocated(CO:05) base:0x26f400000 size:0x100000 align: 0x100000
[0010.705] I> allocated(CO:08) base:0x26f300000 size:0x100000 align: 0x100000
[0010.712] I> allocated(CO:09) base:0x26f200000 size:0x100000 align: 0x100000
[0010.719] I> allocated(CO:15) base:0x26f100000 size:0x100000 align: 0x100000
[0010.726] I> allocated(CO:17) base:0x26f000000 size:0x100000 align: 0x100000
[0010.733] I> allocated(CO:27) base:0x26ef00000 size:0x100000 align: 0x100000
[0010.740] I> allocated(CO:42) base:0x26ee00000 size:0x100000 align: 0x100000
[0010.747] I> allocated(CO:54) base:0x26ed80000 size:0x80000 align: 0x80000
[0010.754] I> allocated(CO:34) base:0x26ed70000 size:0x10000 align: 0x10000
[0010.761] I> allocated(CO:72) base:0x26eb70000 size:0x200000 align: 0x10000
[0010.767] I> allocated(CO:46) base:0x240000000 size:0x20000000 align: 0x20000000
[0010.775] I> allocated(CO:47) base:0x26e600000 size:0x400000 align: 0x200000
[0010.782] I> allocated(CO:48) base:0x26eb50000 size:0x20000 align: 0x10000
[0010.788] I> allocated(CO:69) base:0x26eb30000 size:0x20000 align: 0x10000
[0010.795] I> allocated(CO:49) base:0x26eb20000 size:0x10000 align: 0x10000
[0010.802] I> allocated(CO:50) base:0x26eb10000 size:0x10000 align: 0x10000
[0010.809] I> NSDRAM base: 0x80000000, end: 0x26eb70000, size: 0x1eeb70000
[0010.815] I> Task: Thermal check
[0010.818] I> max_chip_limit = 105
[0010.822] I> min_chip_limit = -28
[0010.825] I> max temp read = 54
[0010.828] I> min temp read = 53
[0010.831] I> Task: Update FSI SCR with thermal fuse data
[0010.836] I> Task: Enable WDT 5th expiry
[0010.840] I> Task: I2C register
[0010.843] I> Task: Set I2C bus freq
[0010.846] I> Task: Reset FSI
[0010.849] I> Task: Pinmux init
[0010.852] I> skipped mmio_addr = 0x9240008
[0010.856] I> skipped mmio_addr = 0x9240000
[0010.860] I> skipped mmio_addr = 0x9240010
[0010.864] I> skipped mmio_addr = 0x9240018
[0010.868] I> skipped mmio_addr = 0x9240020
[0010.872] I> skipped mmio_addr = 0x9240030
[0010.876] I> skipped mmio_addr = 0x9240028
[0010.880] I> skipped mmio_addr = 0x9240038
[0010.883] I> skipped mmio_addr = 0x9240040
[0010.887] I> skipped mmio_addr = 0x9240048
[0010.891] I> skipped mmio_addr = 0x9241000
[0010.895] I> skipped mmio_addr = 0x9241008
[0010.899] I> skipped mmio_addr = 0x9241010
[0010.903] I> skipped mmio_addr = 0x9241018
[0010.907] I> skipped mmio_addr = 0x9241020
[0010.911] I> skipped mmio_addr = 0x9241028
[0010.915] I> skipped mmio_addr = 0x9241030
[0010.919] I> skipped mmio_addr = 0x9241038
[0010.923] I> skipped mmio_addr = 0x9241040
[0010.927] I> skipped mmio_addr = 0x9242000
[0010.931] I> skipped mmio_addr = 0x9242008
[0010.935] I> Task: Prod config init
[0010.938] I> Task: Pad voltage init
[0010.941] I> Task: Prod init
[0010.944] I> Task: Program rst req config reg
[0010.948] I> Task: Common rail init
[0010.952] I> DONE: Thermal config
[0010.956] W> DEVICE_PROD: module = 13, instance = 4 not found in device prod.
[0010.964] I> DONE: SOC rail config
[0010.968] W> PMIC_CONFIG: Rail: MEMIO rail config not found in MB1 BCT.
[0010.975] I> DONE: MEMIO rail config
[0010.979] W> PMIC_CONFIG: Rail: GPU rail info not found in MB1 BCT.
[0010.985] I> DONE: GPU rail info
[0010.988] W> PMIC_CONFIG: Rail: CV rail info not found in MB1 BCT.
[0010.994] I> DONE: CV rail info
[0010.997] I> Task: Mem clock src
[0011.000] I> Task: Misc. board config
[0011.004] I> PMIC_CONFIG: Platform config not found in MB1 BCT.
[0011.009] I> Task: SDRAM init
[0011.012] I> MemoryType: 4 MemBctRevision: 1
[0011.019] I> MSS CAR: PLLM/HUB programming for MemoryType: 4 and MemBctRevision: 1
[0011.026] I> MSS CAR: Init PLLM
[0011.029] I> MSS CAR: Init PLLHUB
[0011.034] I> Encryption: MTS: en, TX: en, VPR: en, GSC: en
[0011.045] I> SDRAM initialized!
[0011.048] I> SDRAM Size in Total 0x200000000
[0011.053] I> Task: Dram Ecc scrub
[0011.056] I> Task: DRAM alias check
[0011.062] I> Task: Program NSDRAM carveout
[0011.066] I> NSDRAM carveout encryption is enabled
[0011.071] I> Program NSDRAM carveout
[0011.074] I> Task: Register checker
[0011.078] I> Task: Enable clock-mon
[0011.082] I> FMON: Fmon re-programming done
[0011.086] I> Task: Mapper init
[0011.089] I> Task: SC7 Context Init
[0011.093] W> SC7_CONTEXT_SAVE: SC7 ctx save is not supported.
[0011.098] I> Task: CCPLEX IST init
[0011.102] I> Task: CPU WP0
[0011.104] I> Loading MCE
[0011.107] I> Slot: 0
[0011.109] I> Binary[8] block-134217728 (partition size: 0x80000)
[0011.115] I> Binary name: MCE
[0011.117] I> Size of crypto header is 8192
[0011.121] I> Size of crypto header is 8192
[0018.713] I> BCH of MCE read from storage
[0018.717] I> BCH address is : 0x4003e000
[0018.721] I> MCE header integrity check is success
[0018.726] I> Binary magic in BCH component 0 is MTSM
[0018.731] I> component binary type is 8
[0018.734] I> Size of crypto header is 8192
[0018.742] I> MCE binary is read from storage
[0018.746] I> MCE binary integrity check is success
[0018.751] I> Binary MCE loaded successfully at 0x40000000 (0x2c880)
[0018.757] I> Size of crypto header is 8192
[0018.761] I> Sending WP0 mailbox command to PSC
[0018.770] I> Task: XUSB Powergate
[0018.773] I> Skipping powergate XUSB.
[0018.777] I> Task: MB1 fixed firewalls
[0018.783] W> Firewall readback mismatch
[0018.788] I> Task: Load bpmp-fw
[0018.791] I> Slot: 0
[0018.793] I> Binary[15] block-251658240 (partition size: 0x180000)
[0018.799] I> Binary name: BPMP_FW
[0018.803] I> Size of crypto header is 8192
[0018.807] I> Size of crypto header is 8192
[0018.811] I> BCH of BPMP_FW read from storage
[0018.815] I> BCH address is : 0x807fe000
[0018.819] I> BPMP_FW header integrity check is success
[0018.824] I> Binary magic in BCH component 0 is BPMF
[0018.828] I> component binary type is 15
[0018.832] I> Size of crypto header is 8192
[0018.853] I> BPMP_FW binary is read from storage
[0018.860] I> BPMP_FW binary integrity check is success
[0018.865] I> Binary BPMP_FW loaded successfully at 0x80000000 (0xf8bc0)
[0018.871] I> Slot: 0
[0018.873] I> Binary[16] block-268435456 (partition size: 0x400000)
[0018.879] I> Binary name: BPMP_FW_DTB
[0018.883] I> Size of crypto header is 8192
[0018.887] I> Size of crypto header is 8192
[0018.891] I> BCH of BPMP_FW_DTB read from storage
[0018.895] I> BCH address is : 0x807fc000
[0018.899] I> BPMP_FW_DTB header integrity check is success
[0018.904] I> Binary magic in BCH component 0 is BPMD
[0018.909] I> component binary type is 16
[0018.913] I> Size of crypto header is 8192
[0018.920] I> BPMP_FW_DTB binary is read from storage
[0018.925] I> BPMP_FW_DTB binary integrity check is success
[0018.931] I> Binary BPMP_FW_DTB loaded successfully at 0x807cd2f0 (0x2ed00)
[0018.938] I> Task: BPMP fw ast config
[0018.941] I> Task: Load psc-fw
[0018.944] I> Slot: 0
[0018.946] I> Binary[17] block-285212672 (partition size: 0xc0000)
[0018.952] I> Binary name: PSC_FW
[0018.955] I> Size of crypto header is 8192
[0018.959] I> Size of crypto header is 8192
[0018.963] I> BCH of PSC_FW read from storage
[0018.967] I> BCH address is : 0x80ffe000
[0018.971] I> PSC_FW header integrity check is success
[0018.976] I> Binary magic in BCH component 0 is PFWP
[0018.981] I> component binary type is 17
[0018.985] I> Size of crypto header is 8192
[0018.995] I> PSC_FW binary is read from storage
[0019.000] I> PSC_FW binary integrity check is success
[0019.005] I> Binary PSC_FW loaded successfully at 0x80fa4680 (0x59980)
[0019.011] I> Task: Load nvdec-fw
[0019.014] I> Slot: 0
[0019.016] I> Binary[7] block-117440512 (partition size: 0x100000)
[0019.022] I> Binary name: NVDEC
[0019.025] I> Size of crypto header is 8192
[0019.029] I> Size of crypto header is 8192
[0019.033] I> BCH of NVDEC read from storage
[0019.037] I> BCH address is : 0x800fe000
[0019.041] I> NVDEC header integrity check is success
[0019.046] I> Binary magic in BCH component 0 is NDEC
[0019.051] I> component binary type is 7
[0019.054] I> Size of crypto header is 8192
[0019.063] I> NVDEC binary is read from storage
[0019.068] I> NVDEC binary integrity check is success
[0019.073] I> Binary NVDEC loaded successfully at 0x80000000 (0x46000)
[0019.081] I> Task: Load tsec-fw
[0019.084] I> TSEC-FW load support not enabled
[0019.089] I> Task: GPIO interrupt map
[0019.092] I> Task: SC7 context save
[0019.096] W> SC7_CONTEXT_SAVE: SC7 ctx save is not supported.
[0019.101] I> Task: Load MB2/Applet/FSKP
[0019.105] I> Loading MB2
[0019.107] I> Slot: 0
[0019.109] I> Binary[6] block-100663296 (partition size: 0x80000)
[0019.115] I> Binary name: MB2
[0019.118] I> Size of crypto header is 8192
[0019.122] I> Size of crypto header is 8192
[0019.126] I> BCH of MB2 read from storage
[0019.130] I> BCH address is : 0x8007e000
[0019.134] I> MB2 header integrity check is success
[0019.138] I> Binary magic in BCH component 0 is MB2B
[0019.143] I> component binary type is 6
[0019.147] I> Size of crypto header is 8192
[0019.158] I> MB2 binary is read from storage
[0019.163] I> MB2 binary integrity check is success
[0019.167] I> Binary MB2 loaded successfully at 0x80000000 (0x68b10)
[0019.174] I> Task: Map CCPLEX SHARED carveout
[0019.178] I> Task: Prepare MB2 params
[0019.182] I> Task: Dram ecc test
[0019.185] I> Task: Misc NV security settings
[0019.189] I> NVDEC sticky bits programming done
[0019.193] I> Successfully powergated NVDEC
[0019.197] I> Task: Disable/Reload WDT
[0019.201] I> Task: Program misc carveouts
[0019.205] I> Program IPC carveouts
[0019.208] I> Task: Disable SCPM/POD reset
[0019.212] I> SLCG Global override status := 0x0
[0019.216] I> MB1: MSS reconfig completed
I> MB2 (version: 0.0.0.0-t234-54845784-934581f8)
I> t234-A01-1-Silicon (0x12347)
I> Boot-mode : RCM BOOT
I> Emulation:
I> Entry timestamp: 0x0125a097
I> Regular heap: [base:0x40040000, size:0x10000]
I> DMA heap: [base:0x270000000, size:0x800000]
I> Task: ARI update carveout TZDRAM (0x50002050)
I> Task: Check MC errors (0x5000204c)
I> Task: Enable hot-plug capability (0x500290f8)
I> Task: Set blob address (0x50002024)
I> Task: TZDRAM heap init (0x5001a0fc)
I> Task: PSC mailbox init (0x50018864)
I> Task: Crypto init (0x50006874)
I> Task: Enable GP-SE clock (0x500021b4)
I> Task: Measured Boot init (0x5001c04c)
I> Task: fTPM silicon identity init (0x5001c1f8)
I> fTPM is not enabled.
I> Task: I2C register (0x50002010)
I> Task: Map CCPLEX_INTERWORLD_SHMEM carveout (0x50001ff8)
I> Task: Program CBB PCIE AMAP regions (0x5001bcf8)
I> Task: Load and authenticate registered FWs (0x5001f064)
I> Task: Load AUXP FWs (0x50028c7c)
I> Successfully register SPE FW load task with MB2 loader
I> Skipping SCE FW load
I> Successfully register RCE FW load task with MB2 loader
I> Successfully register DCE FW load task with MB2 loader
I> Unpowergating APE
I> Unpowergate done
I> Successfully register APE FW load task with MB2 loader
I> Skipping FSI FW load
I> Successfully register XUSB FW load task with MB2 loader
I> spe: Authentication Finalize Done
I> Binary spe loaded successfully at 0x26f300000
I> rce: Authentication Finalize Done
I> Binary rce loaded successfully at 0x26f000000
I> dce: Authentication Finalize Done
I> Binary dce loaded successfully at 0x276000000
I> ape: Authentication Finalize Done
I> Binary ape loaded successfully at 0x26fc00000
I> xusb: Authentication Finalize Done
I> Binary xusb loaded successfully at 0x26f400000
I> Task: Check MC errors (0x5000204c)
I> Task: Carveout setup (0x500217e4)
I> Program remaining OEM carveouts
I> Task: Enable FSI VMON (0x50018234)
I> Task: Restore XUSB sec (0x50001ef4)
I> Task: Enable FSI SE clock (0x50018cc0)
I> Task: Initialize SBSA UART CAR (0x50002118)
I> Task: Initialize CPUBL Params (0x50019cac)
I> CPUBL-params @ 0x272000000
I> Task: Prepare eeprom data (0x50019a78)
I> Task: Unpowergate APE (0x50019428)
W> mb2_unpowergate_ape: skip! APE is in unpowergated state
I> Task: OEM firewalls (0x50025cf0)
I> OEM firewalls configured
I> Task: Powergate APE (0x5001959c)
I> Powergating APE
I> Powergate done
I> Task: OEM firewall restore saved settings (0x50026144)
I> Task: Unhalt AUXPs (0x50028f00)
I> Unhalting SPE…
I> Enabling combined UART
???e: early_init
???c initialized
???c initialized
???n lic initialized
???e: tag is 5243985d1b1eb3f06fac6d36bd7e74ac
???e: SafeRTOS v8.4
???e: init
???heduler initialized
???n hsp initialized
???g initialized
???u initialized
???mp ipc initialized
???e: late init
???u_nic clock initialized
???b clock initialized
??? initialized
???mp hsp initialized
???p1 hsp initialized
???plex ipc initialized
???e: start scheduler
???> Task: Trigger mailbox for PSC-BL1 exit (0x500188e4)
I> Sending opcode 0x4d420802 to psc
??FO: Entering psc_monitor_init!
INFO: GSC22 BOM:0x278002000 SIZE:0x1000000 CLIENT_ACCESS1:00180000
INFO: PSCFW BUILD VERSION: 8a33b23-73b589c-8a15f76-rel-t234
INFO: mstatus:0xa00000808
INFO: Supervisor entry_point:c108c00
?? Received ACK from psc
I> Tas??FO: MONITOR: user task addr:0x278022000, blob offset:0x00020000
INFO: MONITOR: populated user images:13
INFO: mret to Supervisor!
INFO: psc supervisor init.
INFO: psc_irq_init…
INFO: enter idle task.
??wwdt_init: WDT boot cfg 0x710010 sts 0x10
bpmp: socket 0
bpmp: base binary md5 is fcc6f4f897ab64a32c3de470c48f0036
bpmp: combined binary md5 is a5fd653d3815177549cc44e087b1bd9e
bpmp: firmware tag is a5fd653d3815177549cc-fcc6f4f897a
FATAL ERROR [FILE=platform/top/bpmp/startup/sku.c, ERR_UID=598]: chip sku 0xd5 not in /sku/te980m_0
r0_usr 0x5009aef8
r1_usr 0x00000256
r2_usr 0x500651c0
r3_usr 0x50181f70
r4_usr 0x50001ff4
r5_usr 0x500651c0
r6_usr 0x00000256
r7_usr 0x5009aef8
r8_usr 0x50181f70 r8_fiq 0x00000000
r9_usr 0x09090909 r9_fiq 0x00000
r10_usr 0x10101010 r10_fiq 0x00000000
r11_usr 0x11111111 r11_fiq 0x00000000
r12_usr 0x00000001 r12_fiq 0x00000000
sp_usr 0x50181f58 sp_fiq 0x50010820 sp_irq 0x50010c00
sp_svc 0x50011400 sp_abt 0x50010800 sp_und 0x50010770
lr_usr 0x50003179 lr_fiq 0x00000000 lr_irq 0x00000000
lr_svc 0x5000a580 lr_abt 0x00000000 lr_und 0x50001ff8
pc 0x50001ff4
spsr 0x00000010
fpscr 0x00000000
00: base: 50000000 size: 00800000 XN P_RW U_RW Non-shareable outer: WB, no WA inner: WB, no WA
01: base: 00000000 size: 40000000 XN P_RW U_RW Shareable strongly-ordered
02: base: 00000000 size: 00000040 X P_RO U_NA Non-shareable outer: WB, no WA inner: WB, no WA
03: base: 50000000 size: 00010000 X P_RO U_RO Non-shareable outer: WB, no WA inner: WB, no WA
04.1: base: 50020000 size: 00020000 X P_RO U_RO Non-shareable outer: WB, no WA inner: WB, no WA
04.2: base: 50040000 size: 00020000 X P_RO U_RO Non-shareable outer: WB, no WA inner: WB, no WA
04.3: base: 50060000 size: 00020000 X P_RO U_RO Non-shareable outer: WB, no WA inner: WB, no WA
04.4: base: 50080000 size: 00020000 X P_RO U_RO Non-shareable outer: WB, no WA inner: WB, no WA
04.5: base: 500a0000 size: 00020000 X P_RO U_RO Non-shareable outer: WB, no WA inner: WB, no WA
04.6: base: 500c0000 size: 00020000 X P_RO U_RO Non-shareable outer: WB, no WA inner: WB, no WA
05.1: base: 500c4000 size: 00004000 XN P_RW U_RW Non-shareable outer: WB, no WA inner: WB, no WA
05.2: base: 500c8000 size: 00004000 XN P_RW U_RW Non-shareable outer: WB, no WA inner: WB, no WA
05.3: base: 500cc000 size: 00004000 XN P_RW U_RW Non-shareable outer: WB, no WA inner: WB, no WA
05.4: base: 500d0000 size: 00004000 XN P_RW U_RW Non-shareable outer: WB, no WA inner: WB, no WA
05.5: base: 500d4000 size: 00004000 XN P_RW U_RW Non-shareable outer: WB, no WA inner: WB, no WA
05.6: base: 500d8000 size: 00004000 XN P_RW U_RW Non-shareable outer: WB, no WA inner: WB, no WA
05.7: base: 500dc000 size: 00004000 XN P_RW U_RW Non-shareable outer: WB, no WA inner: WB, no WA
06: base: 50180000 size: 00080000 XN P_RO U_NA Non-shareable outer: WB, no WA inner: WB, no WA
07.3: base: 507b0000 size: 00010000 XN P_RO U_RO Non-shareable outer: WB, no WA inner: WB, no WA
07.4: base: 507c0000 size: 00010000 XN P_RO U_RO Non-shareable outer: WB, no WA inner: WB, no WA
07.5: base: 507d0000 size: 00010000 XN P_RO U_RO Non-shareable outer: WB, no WA inner: WB, no WA
07.6: base: 507e0000 size: 00010000 XN P_RO U_RO Non-shareable outer: WB, no WA inner: WB, no WA
07.7: base: 507f0000 size: 00010000 XN P_RO U_RO Non-shareable outer: WB, no WA inner: WB, no WA
08: base: 50202000 size: 00002000 XN P_RW U_RW Non-shareable outer: WT, no WA inner: WT, no WA
10: base: 40070000 size: 00010000 XN P_RW U_RW Non-shareable outer: WB, no WA inner: WB, no WA
15: base: 50180000 size: 00002000 XN P_RW U_RW Non-shareable outer: WB, no WA inner: WB, no WA
Bootstrap@0x50218f40 sp 0x50181f58 stack: 50180000 - 50181ffc
Per task regions for Bootstrap
04: base: 50180000 size: 00002000 XN P_RW U_RW Non-shareable outer: WB, no WA inner: WB, no WA
Enable MMIO: 1, Enable data R/W: 1
call stack:
sp 0x50181f58 pc 0x50001ff4
sp 0x50181f58 pc 0x50003178
sp 0x50181f70 pc 0x50065150
sp 0x50181fb8 pc 0x5002dc36
sp 0x50181fe0 pc 0x5006933e
sp 0x50181ff8 pc 0xaaaaaaaa
eht_idx_find: 0xaaaaaaaa not a valid code address
no eidx for 0xaaaaaaaa
?? Start secure NOR provision (0x5001bb10)
I> Task: Load FSI keyblob (0x50018d08)
I> Task: Unhalt AUXPs (0x50028f08)
I> SCE unhalt skipped
I> Unhalting RCE
I> RCE unhalt successful
I> DCE unhalt successful
I> APE unhalt skipped
I> FSI unhalt skipped
I> Task: Load CPUBL (0x50019dd0)
I> Task: Load TOS (0x5001a560)
?? 9.557968] Camera-FW on t234-rce-safe started
TCU early console enabled.
?? Task: ???ad and authenticate registered FWs (0x5001f064)
I> MB2-params @ 0x40060000
I> cpubl_params: nsdram: carveout: 1, encryption: 1
I> NSDRAM carveout base: 0x80000000, size: 0x1eeb70000
I> cpubl: Authentication Finalize Done
I> Binary cpubl loaded successfully at 0x26e600000
I> tos: Authentication Finalize Done
I> Binary tos loaded successfully at 0x27fdc7860
I> Relocating OP-TEE dtb from: 0x27feff4b0 to 0x27c000860, size: 0x2886
I> [0] START: 0x80000000, SIZE: 0x1eeb70000
I> [1] START: 0x272000000, SIZE: 0x2000000
I> Setting NS memory ranges to OP-TEE dtb finished.
I> eks: Authentication Finalize Done
I> Binary eks loaded successfully at 0x270000200
I> EKB detected (length: 0x410) @ VA:0x270000200
I> Task: Prepare TOS params (0x5001a4d8)
I> Setting EKB blob info to OPTEE dtb finished.
I> Setting OPTEE arg3: 0x27c000860
I> Task: Disable MSS perf stats (0x50028f94)
I> Task: Program display sticky bits (0x50028f10)
I> Task: SMMU external bypass disable (0x50018848)
I> Task: SMMU init (0x50018764)
I> Task: Program GICv3 registers (0x50029034)
I> Task: Audit firewall settings (0x50025f44)
I> MB2 finished
??TICE: BL31: v2.6(release):
NOTICE: BL31: Built : 16:10:54, Jul 11 2024
I/TC: Physical secure memory base 0x27c040000 size 0x3fc0000
I/TC:
I/TC: Non-secure external DT found
I/TC: OP-TEE version: 3.22 (gcc version 9.3.0 (Buildroot 2020.08)) #2 Thu Jul 11 08:07:58 UTC 2024 aarch64
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check Porting guidelines — OP-TEE documentation documentation
I/TC: Primary CPU initializing
I/TC: Test OEM keys are being used. This is insecure for shipping products!
I/TC: Primary CPU switching to normal world boot
??etson UEFI firmware (version 5.0-35550185 built on 2024-02-20T04:21:22+00:00)
??ROR: camera-ip/isp5/isp5.c:1980 [isp5_pm_init] “ERROR: Failed to turn isp power on”
BUG: core/init/init.c:85 [init_all] “*** FIRMWARE INIT FAILED AT LEVEL 95 ***”
??
hello edgar_xia,
here’s error reports
it looks like you’re using an incorrect board configuration.
please double check the platform you’re working with.
besides, please try follow Using initrd flash with Orin NX and Nano.
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