My application needs two jetson Tx1s together to meet the computational demand. This is the reply to a previous topic on the matter:
"The Tegra’s PCIe controller supports root complex. Hence you will need a PCIe switch with non-transparent (NT) bridging, which permits a root complex to be attached upstream. Some switches (like PLX’s 8700 series), include support for multiple NT ports, allowing multiple Jetsons to be hooked up per switch (3 at a time).
The big positive of the architecture is superior IPC bandwidth and offloaded RDMA. The ideal PCI switches are PLX 8717 or PLX 8724 (the 8724, if you require more lanes to connect additional PCIe peripherals in the system). The 8717/24 include 2 NT ports (allowing 3 Jetson) and 4 simultaneous DMA engines.
In theory it’s possible to cable this all up to test it, using the PLX RDK and the Jetson TX1 devkit’s desktop PCIe slot. I hope someone will! :)"
Is there anyone that has actually tried this? Are there additional useful information as regards the PCIe protocol to be developed? Thanks a lot!