My application needs at least two jetson tx1s together to meet the computational demand, is there any low cost way to implement inter-board communication ?
Is it possible to connect two jetson tx1 boards using PCIe ?
specifically, to make two jetson tx1 boards communicating through PCIe means I have to configure one of them as slave mode, is it possible ? anyone know how to do it ?
The Tegra’s PCIe controller supports root complex. Hence you will need a PCIe switch with non-transparent (NT) bridging, which permits a root complex to be attached upstream. Some switches (like PLX’s 8700 series), include support for multiple NT ports, allowing multiple Jetsons to be hooked up per switch (3 at a time).
The big positive of the architecture is superior IPC bandwidth and offloaded RDMA. The ideal PCI switches are PLX 8717 or PLX 8724 (the 8724, if you require more lanes to connect additional PCIe peripherals in the system). The 8717/24 include 2 NT ports (allowing 3 Jetson) and 4 simultaneous DMA engines.
In theory it’s possible to cable this all up to test it, using the PLX RDK and the Jetson TX1 devkit’s desktop PCIe slot. I hope someone will! :)
Hi,
I’m interested in this discussion.
I’m developing an avionic unit with two TX1 modules, so we need a PCIe switch to permit the connection and the communications between the two Tegra modules.
The big challenge is to find a minimum cost PCIe switch at -40°C to 85°C.
Is this PEX8604-BA50BI G a good choice?
Thank you.
Hi Fabrizio_R,
The big challenge is to find a minimum cost PCIe switch at -40°C to 85°C.
Is this PEX8604-BA50BI G a good choice?
You will need to run the experiment to confirm that since we did not have test in that way yet.
Thanks
We have a similar setup, a board with a PEX8619 chip, one port configured as non transparent (NT). We connect this port to the Jetson TX1 with a PCI riser cable.
What we see is that the output of the “lspci” command is empty. During boot we see the following relevant information in the kernel log:
PCIE: enable power rails
probing port 0, using 4 lanes and lane map as 0x14
probing port 1, using 1 lanes and lane map as 0x14
link 0 down, retrying
link 0 down, retrying
link 0 down, retrying
link 0 down, retrying
PCIE: no ports detected
PCIE: Disable power rails
Without the connection between the ports there is no retry.
We use the latest l4t for TX1 (24.2.1).
We had an idea that perhaps turning off SSC would solve our problem, but unfortunately without any success. Do someone have some experience with board-board connections?