Jetson Xavier nx GPIO6 port contol

I am trying to control Xavier NX’s GPIO3_PCC.03.

The gpio number was calculated in the following way,

#define TEGRA_GPIO(port, offset)
((TEGRA_GPIO_PORT_##port * 8) + offset)

= (28 * 8 + 3) + (248) # 248 is offset
= 475

Check the offset with the command below,
$ dmesg | grep “registered GPIOs”
[ 0.891870] gpiochip_setup_dev: registered GPIOs 288 to 511 on device: gpiochip0 (tegra-gpio)
[ 0.900348] gpiochip_setup_dev: registered GPIOs 248 to 287 on device: gpiochip1 (tegra-gpio-aon)
[ 1.091072] gpiochip_setup_dev: registered GPIOs 240 to 247 on device: gpiochip2 (max77620-gpio)

The group selection of gpiochip0 and gpiochip1 was confirmed by the contents of GPIO Ports and Controller Mapping Capter of “TECHNICAL REFERENCE MANUAL NVIDIA Xavier Series System-on-Chip .pdf”.

What is the problem, it is not normally controlled. I need help.


You should check TEGRA_GPIO_PORT_CC in kernel/kernel-5.10/include/dt-bindings/gpio/tegra194-gpio.h.
Your calculation is obviously wrong…
For example, you use a offset from tegra-gpio-aon but your result falls in the range of tegra-gpio…

This topic was automatically closed 14 days after the last reply. New replies are no longer allowed.