Jetson xavier nx I2S with pcm1808

y.rodriguez · March 17, 2023, 1:34pm

Hello ,
I’m trying to implement a audio application on jetson xavier nx with a mic using I2S0 on the board.
I use NVIDIA environment to develop my app .

I’ll try di patch the devitrre with :

`diff --git a/kernel-dts/tegra194-soc/tegra194-soc-audio.dtsi b/kernel-dts/tegra194-soc/tegra194-soc-audio.dtsi
index fe28e08…2c6486a 100644
— a/kernel-dts/tegra194-soc/tegra194-soc-audio.dtsi
+++ b/kernel-dts/tegra194-soc/tegra194-soc-audio.dtsi
@@ -277,16 +277,18 @@
<&bpmp_clks TEGRA194_CLK_PLLA_OUT0>,
<&bpmp_clks TEGRA194_CLK_I2S1_SYNC_INPUT>,
<&bpmp_clks TEGRA194_CLK_SYNC_I2S1>,

                                   <&bpmp_clks TEGRA194_CLK_I2S1_SYNC_INPUT>;

                                   <&bpmp_clks TEGRA194_CLK_I2S1_SYNC_INPUT>,

                                   <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
                          clock-names = "i2s", "i2s_clk_parent", "ext_audio_sync",

                                        "audio_sync", "clk_sync_input";

                                        "audio_sync", "clk_sync_input", "aud_mclk";
                          assigned-clocks =

                                  <&bpmp_clks TEGRA194_CLK_I2S1>;

                                  <&bpmp_clks TEGRA194_CLK_I2S1>,

:…skipping…
diff --git a/kernel-dts/tegra194-soc/tegra194-soc-audio.dtsi b/kernel-dts/tegra194-soc/tegra194-soc-audio.dtsi
index fe28e08…2c6486a 100644
— a/kernel-dts/tegra194-soc/tegra194-soc-audio.dtsi
+++ b/kernel-dts/tegra194-soc/tegra194-soc-audio.dtsi
@@ -277,16 +277,18 @@
<&bpmp_clks TEGRA194_CLK_PLLA_OUT0>,
<&bpmp_clks TEGRA194_CLK_I2S1_SYNC_INPUT>,
<&bpmp_clks TEGRA194_CLK_SYNC_I2S1>,

                                   <&bpmp_clks TEGRA194_CLK_I2S1_SYNC_INPUT>;

                                   <&bpmp_clks TEGRA194_CLK_I2S1_SYNC_INPUT>,

                                   <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
                          clock-names = "i2s", "i2s_clk_parent", "ext_audio_sync",

                                        "audio_sync", "clk_sync_input";

                                        "audio_sync", "clk_sync_input", "aud_mclk";
                          assigned-clocks =

                                  <&bpmp_clks TEGRA194_CLK_I2S1>;

                                  <&bpmp_clks TEGRA194_CLK_I2S1>,

                                  <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
                          assigned-clock-parents =
                                  <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;
                          assigned-clock-rates = <1536000>;
                          fsync-width = <31>;

                          status = "disabled";

                          status = "okay";
                  };

                  tegra_i2s2: i2s@2901100 {`

But i can’t read audio input and i don’t have the aud_mclk on pin 211 (GPIO9).

What modification should be done on the device-tre to be able to use an I2s input .

Thanks

atalambedu · March 20, 2023, 5:50am

Hi y.rodriguez,

Here are few suggestions

You don’t need to do any additional device tree settings on TOT but ensure below steps and check if recording works

Ensure that final DTB has the i2s you are using in enabled state (Helping command: dtc -I fs -O dts /proc/device-tree >/tmp/dt.log)
Set Jetson I2S as bitclock and frame clock master through below setting. This should take care of the clock required if its a I2S mic with no I2C interface.

amixer -c 1 cset name="I2S1 codec master mode" "cbs-cfs"

Set relevant mixer controls

amixer -c 1 cset name="ADMAIF1 Mux" I2S1

Record in the mic supported format

arecord -D hw:1,0 -r <rate> -c <channels> -f <sample_format> <out_wav>

Ensure pin connections (i.e codec data IN to Jetson I2S data IN etc…) and voltage pin connections are proper

Also sharing usage guide for reference

Thanks

y.rodriguez · March 20, 2023, 8:44am

Hi @atalambedu ,

Thanks for you help i try this commands and i have nothing when i read the file .
When i check aud_mclk on gpio9 ther is no clock signal . How can i activate this clock ?

Thanks

atalambedu · March 20, 2023, 8:51am

Hi,

You should probe BCLK and Frame CLK lines. Jetson I2S BCLK will provide the necessary clocks and aud_mclk is not required.

aud_mclk is generally required for codecs with I2C where the codec uses aud_mclk to generate some internal clocks. Dont see a need for this in your case. Pls correct if I am missing something

What is the error you see when you start recording on screen. and is there any error in dmesg logs?

Also, is Jetson Xavier NX that you are using is a module or Devkit. If dev kit, 40 pin header has I2S5. I see that you are using I2S1

Please ensure to set pinmux for I2S. Guide for same is available at Configuring the Jetson Expansion Headers — Jetson Linux<br/>Developer Guide 34.1 documentation if you are using I2S from 40 pin header

For non 40 pin header I2S, pinmux setting guide is available at Jetson Module Adaptation and Bring-Up: Jetson Xavier NX Series — Jetson Linux<br/>Developer Guide 34.1 documentation

Thanks

y.rodriguez · March 20, 2023, 9:07am

Thanks for you quick reply @atalambedu .
I don’t see any error on dmesg and when i start recording.
I’m not using a devkit i’m using a custom board.

aud_mclk in connected to pcm1808

Electrical schema :

I’ll watch your links.
Thanks

y.rodriguez · March 20, 2023, 2:12pm

That what i have on my final dtb file :
i2s@2901000 {
compatible = “nvidia,tegra210-i2s”;
reg = <0x00 0x2901000 0x00 0x100>;
nvidia,ahub-i2s-id = <0x00>;
clocks = <0x04 0x38 0x04 0x68 0x04 0x39 0x04 0x91 0x04 0x39 0x04 0x07>;
clock-names = “i2s\0i2s_clk_parent\0ext_audio_sync\0audio_sync\0clk_sync_input\0aud_mclk”;
assigned-clocks = <0x04 0x38 0x04 0x07>;
assigned-clock-parents = <0x04 0x68>;
assigned-clock-rates = <0x177000>;
fsync-width = <0x1f>;
status = “okay”;
linux,phandle = <0x2d>;
phandle = <0x2d>;
};

atalambedu · March 21, 2023, 4:57am

Hi,

Looks like the external system clk is required for your audio card.
Which jetpack version are you using and what is the desired aud_mclk frequency?

Guide to set desired aud_mclk (for JP 5.*) is available at Audio Setup and Development — Jetson Linux<br/>Developer Guide 34.1 documentation and involves DT edit. Pls set as per this and reflash the compiled dtb

Also, like i mentioned earlier, you have to set pinmux for I2S and aud_mclk pins before this. Links are mentioned in my earlier post. Pinmux essentially converts the pins from being GPIOs to functional ones where desired function like i2s_* or clk is supported

status=“okay” in i2s node implies that it is enabled. So thiss part is fine

Regards

y.rodriguez · March 21, 2023, 10:18am

Hello,
I’m on jetpack tegra-l4t-r32.5.1.
I update the dts the clock rates was missing but i dont have any clock either .
Dts for clocks :
clock-names = “pll_a”, “pll_a_out0”, “extern1”;
assigned-clocks = <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>,
<&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
+
assigned-clock-parents = <&bpmp_clks TEGRA194_CLK_PLLA>,
<&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;
+

         assigned-clock-rates = <0>,<19000000>;

Pn mux dts :

diff --git a/tegra194-p3668-all-p3509-0000-hdr40.dts b/tegra194-p3668-all-p3509-0000-hdr40.dts
index 4138526…20af9e1 100644
— a/tegra194-p3668-all-p3509-0000-hdr40.dts
+++ b/tegra194-p3668-all-p3509-0000-hdr40.dts
@@ -24,12 +24,13 @@
pinctrl-0 = <&hdr40_pinmux>;
hdr40_pinmux: header-40pin-pinmux {
pin7 {

                                  nvidia,lpdr = <0x00>;

                                  nvidia,enable-input = <0x00>;

                                  nvidia,tristate = <0x00>;

                                  nvidia,pull = <0x00>;

                                  nvidia,function = "aud";

                                  nvidia,pins = "aud_mclk_ps4";

                                  };
                          pin8 {
                                  nvidia,pins = "uart1_tx_pr2";
                                  nvidia,pull = <TEGRA_PIN_PULL_NONE>;

@@ -54,11 +55,12 @@
nvidia,lpdr = <TEGRA_PIN_DISABLE>;
};
pin12 {

                                  nvidia,lpdr = <0x00>;

                                  nvidia,enable-input = <0x01>;

                                  nvidia,tristate = <0x00>;

                                  nvidia,pull = <0x01>;

                                  nvidia,function = "i2s5";
                                  nvidia,pins = "dap5_sclk_pt5";
                          };
                          pin13 {
                                  nvidia,pins = "spi3_sck_py0";

@@ -182,12 +184,13 @@
nvidia,lpdr = <TEGRA_PIN_DISABLE>;
};
pin35 {

                                  nvidia,lpdr = <0x00>;

                                  nvidia,enable-input = <0x01>;

                                  nvidia,tristate = <0x00>;

                                  nvidia,pull = <0x01>;

                                  nvidia,function = "i2s5";
                                  nvidia,pins = "dap5_fs_pu0";

                          pin36 {
                                  nvidia,pins = "uart1_cts_pr5";
                                  nvidia,pull = <TEGRA_PIN_PULL_UP>;

                                  nvidia,lpdr = <TEGRA_PIN_DISABLE>;
                          };
                          pin38 {

                                  nvidia,lpdr = <0x00>;

                                  nvidia,enable-input = <0x01>;

                                  nvidia,tristate = <0x01>;

                                  nvidia,pull = <0x01>;

                                  nvidia,function = "i2s5";

                                  nvidia,pins = "dap5_din_pt7";
                          };
                          pin40 {

                                  nvidia,lpdr = <0x00>;

                                  nvidia,enable-input = <0x00>;

                                  nvidia,tristate = <0x00>;

                                  nvidia,pull = <0x01>;

                                  nvidia,function = "i2s5";

                                  nvidia,pins = "dap5_dout_pt6";

Dou you see any error on my conf ?

Thanks

atalambedu · March 21, 2023, 11:56am

Hi,

For tegra-l4t-r32.5.1, the guide is here

When giving desired rate, give exact value i.e for ex: 18432000 if you datasheet says 384*fs (assuming fs is
48000)

Regarding pinmux, are you not using i2s1? above seems to be pinmux for i2s5

Thanks

y.rodriguez · March 22, 2023, 12:24pm

Hi i used this post to configure aud_clock Pinmux adjustments for audio codec

but now i stiil not have I2S1 Sclock .

Thanks for your help

atalambedu · March 23, 2023, 10:11am

Hi,

Could you share o/p of “sudo cat /sys/kernel/debug/tegra_pinctrl_reg” as an attachment.

Also, confirm if you are using I2S1 or I2S5.

Thanks

y.rodriguez · March 24, 2023, 8:28am

Hi @atalambedu ,
I’m using I2S1.
I attached the files you ask and the pinmux filed that i used for my bootloader pinmux file .

Thanks
tegra19x-mb1-pinmux-p3668-a01.cfg (26.7 KB)
pinctrl_reg.txt (12.4 KB)

atalambedu · March 24, 2023, 9:36am

Hi y.rodriguez,

Thanks for the data.

“I’m using I2S1”.

But your schematic diagram in Jetson xavier nx I2S with pcm1808 - #7 by y.rodriguez shows that you are taking I2S interface out of 193, 195, 197, 199. This corresponds to I2S5. Correct me if you are using some other pins. The I2S numbering can be figured out from the pinmux sheet

I have generated cfg from the dt generated by above sheet and the pinmux settings in cfg files for I2S5 and aud_mclk should be as given below

pinmux.0x02431020 = 0x00000408; # aud_mclk_ps4: aud, pull-up, tristate-disable, input-disable, lpdr-disable
pinmux.0x02431080 = 0x00000444; # dap5_sclk_pt5: i2s5, pull-down, tristate-disable, input-enable, lpdr-disable
pinmux.0x02431078 = 0x00000404; # dap5_dout_pt6: i2s5, pull-down, tristate-disable, input-disable, lpdr-disable
pinmux.0x02431070 = 0x00000454; # dap5_din_pt7: i2s5, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x02431068 = 0x00000444; # dap5_fs_pu0: i2s5, pull-down, tristate-disable, input-enable, lpdr-disable

The dump you provided does not align with above.

Please correct the same. You could make the settings through this alternate method as well for testing sake. But follow the documented method for making pinmux changes in general

sudo apt-get install -y busybox
sudo busybox devmem2 0x02431068 w 0x444
sudo busybox devmem2  0x02431070 w 0x454
sudo busybox devmem2  0x02431078 w 0x404
sudo busybox devmem2  0x02431080 w 0x444
sudo busybox devmem2  0x02431020 w 0x408

After setting above pinmux, need to correct amixer settings as below to set up path for recording

amixer -c 1 cset name="I2S5 codec master mode" "cbs-cfs"
amixer -c 1 cset name="ADMAIF1 Mux" I2S5
arecord -D hw:1,0 -r <rate> -c <channels> -f <sample_format> <out_wav>

Let me know if this helps

Thanks

y.rodriguez · March 24, 2023, 3:03pm

Hi @atalambedu ,
Thanks a lots for your help i have now all my clocks so that great , i have no sound yet but that should be an hardware issue .

Regards

atalambedu · March 27, 2023, 9:11am

Glad to know that clocks are working. If no other issue, you could mark my earlier comment as solution and close the issue

Thanks

y.rodriguez · March 27, 2023, 10:29am

Just a quick question why when i launch record command the frequency of aud_mclk changed ?

atalambedu · March 28, 2023, 5:38am

Hi y.rodriguez,

aud_mclk rate depends on the mclk_scale property mentioned in DT. By default it is 256*fs (fs being sample rate). There is a provision to mention exact rate as well. I have provided link for same in my previos comments.
For further queries, create a new forum request

Thanks

kayccc · March 29, 2023, 6:02am