L4T R23.2 for Jetson TX1 released

See this Linux4Tegra R23.2 release for Jetson TX1, available here: https://developer.nvidia.com/embedded/linux-tegra

See the Release Notes: http://developer.download.nvidia.com/embedded/L4T/r23_Release_v2.0/Tegra_Linux_Driver_Package_Release_Notes_R23.2.0.pdf
note: in order to meet 24x7 and 4/4/16 duty cycles, starting with this release the stock DVFS table has a max CPU frequency of 1734MHz.

Jetpack 2.1 bundle is provided here: https://developer.nvidia.com/embedded/dlc/jetpack-l4t-2_1

edit 9/13/2016: L4T R24.1 / JetPack 2.3 has now been released.

Hello!

Could you please tell me where to download а file ‘r23.1_v4l2.tgz’,
that is referenced Tegra_Linux_Driver_Package_Documents_R23.2

quote

L4T R23.2 Release (One patch)
$ git am 0001-ARM64-adding-OV5693-V4L2-on-E3326-jetson_cv.patch

Thanks for the update dusty. I have a few questions though. I cannot find the “NVIDIA Tegra Linux Driver Package Development Guide” in the documentation tar ball provided with this release. Link is http://developer.nvidia.com/embedded/dlc/l4t-documentation-23-2. It was present in the documentation for L4T_R23.1

I have a TX1 board running L4T_R23.1 and I wish to update it to the latest one without flashing all over again. There was a section for updating the L4T version in the Jetson TK1’s development guide. I would like to do the same with this board as well. Could you please mention the steps to be done or atleast point me to the updated development guide containing this procedure.

OK thanks, here’s the patch:

From 62ee53eab2da89223a7ef69539e60bba8714ca5b Mon Sep 17 00:00:00 2001
Subject: [PATCH] ARM64: adding OV5693 V4L2 on E3326 jetson_cv

Adding OV5693 V4L2 DT entries for support on E3326
jetson_cv.

Bug 200143026

Change-Id: I6250cb967dede6e82048f206ec0fb1b659227fd3
---
 .../dts/tegra210-jetson-cv-base-p2597-2180-a00.dts |  14 --
 .../tegra210-camera-e3326-a00.dtsi                 | 263 +++++++++++++++++++++
 .../tegra210-ers-camera-e2249-1002-a00.dtsi        |  36 +--
 .../tegra210-jetson-cv-camera-e3326-a00.dtsi       | 105 ++------
 4 files changed, 297 insertions(+), 121 deletions(-)
 create mode 100644 arch/arm64/boot/dts/tegra210-platforms/tegra210-camera-e3326-a00.dtsi

diff --git a/arch/arm64/boot/dts/tegra210-jetson-cv-base-p2597-2180-a00.dts b/arch/arm64/boot/dts/tegra210-jetson-cv-base-p2597-2180-a00.dts
index 419048d..fef3dc7 100644
--- a/arch/arm64/boot/dts/tegra210-jetson-cv-base-p2597-2180-a00.dts
+++ b/arch/arm64/boot/dts/tegra210-jetson-cv-base-p2597-2180-a00.dts
@@ -987,20 +987,6 @@
 		};
 	};
 
-	camera-pcl {
-		profiles {
-			ov5693-pcl@2_0036 {
-				use_of_node = "yes";
-				dev_name = "ov5693";
-				num = <1>;
-				vana-supply = <&en_vdd_cam_hv_2v8>;
-				vif-supply = <&en_vdd_cam>;
-				cam2-gpios = <&gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
-				reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
-			};
-		};
-	};
-
 	serial@70006300 {
 		dma-names = "tx";
 	};
diff --git a/arch/arm64/boot/dts/tegra210-platforms/tegra210-camera-e3326-a00.dtsi b/arch/arm64/boot/dts/tegra210-platforms/tegra210-camera-e3326-a00.dtsi
new file mode 100644
index 0000000..193319b
--- /dev/null
+++ b/arch/arm64/boot/dts/tegra210-platforms/tegra210-camera-e3326-a00.dtsi
@@ -0,0 +1,263 @@
+/*
+ * Copyright (c) 2015, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <dt-bindings/media/camera.h>
+#include <dt-bindings/platform/t210/t210.h>
+
+/ {
+	ov5693_c@36 {
+		compatible = "nvidia,ov5693";
+
+		/* Physical dimensions of sensor */
+		physical_w = "3.674";
+		physical_h = "2.738";
+
+		/* Define any required hw resources needed by driver */
+		/* ie. clocks, io pins, power sources */
+		avdd-reg = "vana";
+		iovdd-reg = "vif";
+
+		/**
+		* Generic formula to calculate different parameters.
+		* Please add the formula in proper parenthesis.
+		* Formula must contain only these operators '*' '/' '+' '-' '(' ')'
+		* Formula containing both numbers and variables is supported. Refer example #3.
+		* There must be atleast one operator inside the parenthesis. Refer example #4.
+		* Don't use spaces. Refer example #5.
+		*
+		* Examples -
+		* 1. formula = "(powerx+powery)+(exposure*2)"; /// correct example
+		* 2. formula = "((2*(6-1))/2)*4";          /// correct example
+		* 3. formula = "((powerx*(6-1))/2)*4";     /// correct example
+		* 4. formula = "((2*(6-1))*2)/(2)";        /// incorrect example - extra use of parenthesis
+		* 5. formula = "((2*(6-1)) / 2)*4";        /// incorrect example - use of spaces
+		*/
+
+		/**
+		* A modeX node is required to support v4l2 driver
+		* implementation with NVIDIA camera software stack
+		*
+		* mclk_khz = "";
+		* Standard MIPI driving clock, typically 24MHz
+		*
+		* num_lanes = "";
+		* Number of lane channels sensor is programmed to output
+		*
+		* tegra_sinterface = "";
+		* The base tegra serial interface lanes are connected to
+		*
+		* discontinuous_clk = "";
+		* The sensor is programmed to use a discontinuous clock on MIPI lanes
+		*
+		* dpcm_enable = "true";
+		* The sensor is programmed to use a DPCM modes
+		*
+		* cil_settletime = "";
+		* MIPI lane settle time value.
+		* A "0" value attempts to autocalibrate based on mclk_multiplier
+		*
+		*
+		*
+		*
+		* active_w = "";
+		* Pixel active region width
+		*
+		* active_h = "";
+		* Pixel active region height
+		*
+		* pixel_t = "";
+		* The sensor readout pixel pattern
+		*
+		* readout_orientation = "0";
+		* Based on camera module orientation.
+		* Only change readout_orientation if you specifically
+		* Program a different readout order for this mode
+		*
+		* line_length = "";
+		* Pixel line length (width) for sensor mode.
+		* This is used to calibrate features in our camera stack.
+		*
+		* mclk_multiplier = "";
+		* Multiplier to MCLK to help time hardware capture sequence
+		* TODO: Assign to PLL_Multiplier as well until fixed in core
+		*
+		* pix_clk_hz = "";
+		* Sensor pixel clock used for calculations like exposure and framerate
+		*
+		*
+		*
+		*
+		* inherent_gain = "";
+		* Gain obtained inherently from mode (ie. pixel binning)
+		*
+		* min_gain_val = ""; (floor to 6 decimal places)
+		* max_gain_val = ""; (floor to 6 decimal places)
+		* Gain limits for mode
+		*
+		* min_exp_time = ""; (ceil to integer)
+		* max_exp_time = ""; (ceil to integer)
+		* Exposure Time limits for mode (us)
+		*
+		*
+		* min_hdr_ratio = "";
+		* max_hdr_ratio = "";
+		* HDR Ratio limits for mode
+		*
+		* min_framerate = "";
+		* max_framerate = "";
+		* Framerate limits for mode (fps)
+		*/
+		mode0 { // OV5693_MODE_2592X1944
+			mclk_khz = "24000";
+			num_lanes = "2";
+			tegra_sinterface = "serial_c";
+			discontinuous_clk = "no";
+			dpcm_enable = "false";
+			cil_settletime = "0";
+
+			active_w = "2592";
+			active_h = "1944";
+			pixel_t = "bayer_bggr";
+			readout_orientation = "90";
+			line_length = "2688";
+			inherent_gain = "1";
+			mclk_multiplier = "6.67";
+			pix_clk_hz = "160000000";
+
+			min_gain_val = "1.0";
+			max_gain_val = "16";
+			min_hdr_ratio = "1";
+			max_hdr_ratio = "64";
+			min_framerate = "1.816577";
+			max_framerate = "30";
+			min_exp_time = "34";
+			max_exp_time = "550385";
+		};
+
+		mode1 { //OV5693_MODE_2592X1458
+			mclk_khz = "24000";
+			num_lanes = "2";
+			tegra_sinterface = "serial_c";
+			discontinuous_clk = "no";
+			dpcm_enable = "false";
+			cil_settletime = "0";
+
+			active_w = "2592";
+			active_h = "1458";
+			pixel_t = "bayer_bggr";
+			readout_orientation = "90";
+			line_length = "2688";
+			inherent_gain = "1";
+			mclk_multiplier = "6.67";
+			pix_clk_hz = "160000000";
+
+			min_gain_val = "1.0";
+			max_gain_val = "16";
+			min_hdr_ratio = "1";
+			max_hdr_ratio = "64";
+			min_framerate = "1.816577";
+			max_framerate = "30";
+			min_exp_time = "34";
+			max_exp_time = "550385";
+		};
+
+		mode2 { //OV5693_MODE_1280X720
+			mclk_khz = "24000";
+			num_lanes = "2";
+			tegra_sinterface = "serial_c";
+			discontinuous_clk = "no";
+			dpcm_enable = "false";
+			cil_settletime = "0";
+
+			active_w = "1280";
+			active_h = "720";
+			pixel_t = "bayer_bggr";
+			readout_orientation = "90";
+			line_length = "1752";
+			inherent_gain = "1";
+			mclk_multiplier = "6.67";
+			pix_clk_hz = "160000000";
+
+			min_gain_val = "1.0";
+			max_gain_val = "16";
+			min_hdr_ratio = "1";
+			max_hdr_ratio = "64";
+			min_framerate = "2.787078";
+			max_framerate = "120";
+			min_exp_time = "22";
+			max_exp_time = "358733";
+		};
+
+		// HDR Modes
+		mode3 { //OV5693_MODE_2592X1944_HDR
+			mclk_khz = "24000";
+			num_lanes = "2";
+			tegra_sinterface = "serial_c";
+			discontinuous_clk = "no";
+			dpcm_enable = "false";
+			cil_settletime = "0";
+
+			active_w = "2592";
+			active_h = "1944";
+			pixel_t = "hdr_bggr";
+			readout_orientation = "90";
+			line_length = "3696";
+			inherent_gain = "1";
+			mclk_multiplier = "7.33";
+			pix_clk_hz = "176000000";
+
+			min_gain_val = "1.0";
+			max_gain_val = "16";
+			min_hdr_ratio = "1";
+			max_hdr_ratio = "64";
+			min_framerate = "1.453262";
+			max_framerate = "24";
+			min_exp_time = "42";
+			max_exp_time = "687981";
+		};
+	};
+
+	tegra-camera-platform {
+		compatible = "nvidia, tegra-camera-platform";
+
+		/**
+		* The general guideline for naming badge_info contains 3 parts, and is as follows,
+		* The first part is the camera_board_id for the module; if the module is in a FFD
+		* platform, then use the platform name for this part.
+		* The second part contains the position of the module, ex. “rear” or “front”.
+		* The third part contains the last 6 characters of a part number which is found
+		* in the module's specsheet from the vender.
+		*/
+		modules {
+			module0 {
+				badge = "e3326_front_P5V27C";
+				position = "rear";
+				orientation = "1";
+				drivernode0 {
+					/* Declare PCL support driver (classically known as guid)  */
+					pcl_id = "v4l2_soc_sensor";
+					/* Declare the device-tree hierarchy to driver instance */
+					proc-device-tree = "/proc/device-tree/ov5693_c@36";
+				};
+				drivernode1 {
+					/* Declare PCL support driver (classically known as guid)  */
+					pcl_id = "v4l2_focuser_stub";
+				};
+			};
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/tegra210-platforms/tegra210-ers-camera-e2249-1002-a00.dtsi b/arch/arm64/boot/dts/tegra210-platforms/tegra210-ers-camera-e2249-1002-a00.dtsi
index a5db675..6d8de63 100644
--- a/arch/arm64/boot/dts/tegra210-platforms/tegra210-ers-camera-e2249-1002-a00.dtsi
+++ b/arch/arm64/boot/dts/tegra210-platforms/tegra210-ers-camera-e2249-1002-a00.dtsi
@@ -98,12 +98,12 @@
 		* inherent_gain = "";
 		* Gain obtained inherently from mode (ie. pixel binning)
 		*
-		* min_gain_val = "";
-		* max_gain_val = "";
+		* min_gain_val = ""; (floor to 6 decimal places)
+		* max_gain_val = ""; (floor to 6 decimal places)
 		* Gain limits for mode
 		*
-		* min_exp_time = "";
-		* max_exp_time = "";
+		* min_exp_time = ""; (ceil to integer)
+		* max_exp_time = ""; (ceil to integer)
 		* Exposure Time limits for mode (us)
 		*
 		*
@@ -139,8 +139,8 @@
 			max_hdr_ratio = "64";
 			min_framerate = "1.462526";
 			max_framerate = "30";
-			min_exp_time = "13";
-			max_exp_time = "683709";
+			min_exp_time = "11";
+			max_exp_time = "683645";
 			embedded_metadata_height = "4";
 		};
 
@@ -166,8 +166,8 @@
 			max_hdr_ratio = "64";
 			min_framerate = "1.462526";
 			max_framerate = "30";
-			min_exp_time = "13";
-			max_exp_time = "683709";
+			min_exp_time = "11";
+			max_exp_time = "683645";
 			embedded_metadata_height = "4";
 		};
 
@@ -193,8 +193,8 @@
 			max_hdr_ratio = "64";
 			min_framerate = "1.462526";
 			max_framerate = "30";
-			min_exp_time = "13";
-			max_exp_time = "683709";
+			min_exp_time = "11";
+			max_exp_time = "683645";
 			embedded_metadata_height = "4";
 		};
 
@@ -220,8 +220,8 @@
 			max_hdr_ratio = "64";
 			min_framerate = "1.462526";
 			max_framerate = "30";
-			min_exp_time = "13";
-			max_exp_time = "683709";
+			min_exp_time = "11";
+			max_exp_time = "683645";
 			embedded_metadata_height = "4";
 		};
 
@@ -247,8 +247,8 @@
 			max_hdr_ratio = "64";
 			min_framerate = "1.462526";
 			max_framerate = "30";
-			min_exp_time = "13";
-			max_exp_time = "683709";
+			min_exp_time = "11";
+			max_exp_time = "683645";
 			embedded_metadata_height = "4";
 		};
 
@@ -274,8 +274,8 @@
 			max_hdr_ratio = "64";
 			min_framerate = "1.462526";
 			max_framerate = "30";
-			min_exp_time = "13";
-			max_exp_time = "683709";
+			min_exp_time = "11";
+			max_exp_time = "683645";
 			embedded_metadata_height = "4";
 		};
 
@@ -301,8 +301,8 @@
 			max_hdr_ratio = "64";
 			min_framerate = "1.462526";
 			max_framerate = "120";
-			min_exp_time = "13";
-			max_exp_time = "683709";
+			min_exp_time = "11";
+			max_exp_time = "683645";
 			embedded_metadata_height = "4";
 		};
 	};
diff --git a/arch/arm64/boot/dts/tegra210-platforms/tegra210-jetson-cv-camera-e3326-a00.dtsi b/arch/arm64/boot/dts/tegra210-platforms/tegra210-jetson-cv-camera-e3326-a00.dtsi
index ffeef62..45af92d 100644
--- a/arch/arm64/boot/dts/tegra210-platforms/tegra210-jetson-cv-camera-e3326-a00.dtsi
+++ b/arch/arm64/boot/dts/tegra210-platforms/tegra210-jetson-cv-camera-e3326-a00.dtsi
@@ -15,103 +15,30 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-#include <dt-bindings/media/camera.h>
-#include <dt-bindings/platform/t210/t210.h>
-
-#define CAM_I2C_BUS	6
+#include <tegra210-platforms/tegra210-camera-e3326-a00.dtsi>
 
 #define CAM0_RST_L	TEGRA_GPIO(S, 4)
-#define CAM0_PWDN		TEGRA_GPIO(S, 7)
-#define CAM1_RST_L	TEGRA_GPIO(S, 5)
-#define CAM1_PWDN		TEGRA_GPIO(T, 0)
+#define CAM0_PWDN	TEGRA_GPIO(S, 7)
 
 /* camera control gpio definitions */
 
 / {
-	tegra-camera-platform {
-		compatible = "nvidia, tegra-camera-platform";
+	ov5693_c@36 {
+		/* Define any required hw resources needed by driver */
+		/* ie. clocks, io pins, power sources */
+		mclk = "cam_mclk1";
+		reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
+		pwdn-gpios = <&gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
+		vana-supply = <&en_vdd_cam_hv_2v8>;
+		vif-supply = <&en_vdd_cam>;
 	};
 
-	camera-pcl {
-		compatible = "nvidia,tegra210-camera", "simple-bus";
-		configuration = <0xAA55AA55>;
-
-		modules {
-			module0: module0@modules {
-				compatible = "sensor,front";
-				badge_info = "e3326_front_P5V27C";
-
-				sensor {
-					profile = <&ov5693_2>;
-					platformdata = "t210ref_ov5693f_pdata";
-				};
-			};
-		};
-
-		profiles {
-			ov5693_2: ov5693-pcl@2_0036 {
-				index = <0>;
-				chipname = "pcl_OV5693f";
-				type = "sensor";
-				guid = "sOV5693f";
-				position = <0>;
-				bustype = "i2c";
-				busnum = <CAM_I2C_BUS>;
-				addr = <0x36>;
-				datalen = <2>;
-				pinmuxgrp = <0xFFFF>;
-				gpios = <2>;
-				regulators = "vana", "vif";
-				clocks = "cam_mclk1";
-				drivername = "ov5693.1";
-				devid = <0x5693>;
-				poweron = <
-					CAMERA_IND_CLK_SET(10000)
-					CAMERA_GPIO_CLR(CAM0_PWDN)
-					CAMERA_GPIO_CLR(CAM0_RST_L)
-					CAMERA_WAITMS(1)
-					CAMERA_REGULATOR_ON(0)
-					CAMERA_REGULATOR_ON(1)
-					CAMERA_WAITMS(1)
-					CAMERA_GPIO_SET(CAM0_PWDN)
-					CAMERA_GPIO_SET(CAM0_RST_L)
-					CAMERA_WAITMS(10)
-					CAMERA_END
-					>;
-				poweroff = <
-					CAMERA_IND_CLK_CLR
-					CAMERA_GPIO_CLR(CAM0_PWDN)
-					CAMERA_GPIO_CLR(CAM0_RST_L)
-					CAMERA_WAITUS(10)
-					CAMERA_REGULATOR_OFF(1)
-					CAMERA_REGULATOR_OFF(0)
-					CAMERA_END
-					>;
-				/* sensor capabilities */
-				cap-version = <0x34340002>;
-				cap-identifier = "OV5693.1";
-				cap-sensor_nvc_interface = <5>;
-				cap-pixel_types = <0x101>;
-				cap-orientation = <1>;
-				cap-direction = <1>;
-				cap-initial_clock_rate_khz = <6000>;
-				cap-h_sync_edge = <0>;
-				cap-v_sync_edge = <0>;
-				cap-mclk_on_vgp0 = <0>;
-				cap-csi_port = <1>;
-				cap-data_lanes = <2>;
-				cap-virtual_channel_id = <0>;
-				cap-discontinuous_clk_mode = <0>;
-				cap-cil_threshold_settle = <0>;
-				cap-min_blank_time_width = <16>;
-				cap-min_blank_time_height = <16>;
-				cap-preferred_mode_index = <0>;
-				cap-external_clock_khz_0 = <24000>;
-				cap-clock_multiplier_0 = <8000000>;
-				cap-external_clock_khz_1 = <0>;
-				cap-clock_multiplier_1 = <0>;
-				cap-hdr-enabled;
-			};
+	gpio: gpio@6000d000 {
+		camera-control {
+			gpio-output-low = <
+				CAM0_RST_L
+				CAM0_PWDN
+				>;
 		};
 	};
 };
-- 
2.1.4

The directory structure of the Tegra_Linux_Driver_Package_Documents linked to above was modified a little bit since last release, but still contains the info from before with 23.1. The PDF version of the driver documents which used to be located in the baggage/ subdirectory was removed in lieu of the HTML documentation for synchronization. The same info is included in the HTML as the previous 23.1, with the addition of the V4L2 section.

After untarring the document package, open Start_L4T_Docs.html or index.html to bring up the L4T driver docs.

I recall that back in the early days of TK1, there may have been option to upgrade one of the L4T releases in-place (R21.1 to R21.2 I think), however in general (due to bootloader & kernel updates/patches/ect.) this approach is not recommended for stability. To my knowledge it hasn’t been included in the docs since early TK1 release and no TX1 releases, sorry. If you wish, you can attempt using the old TK1 procedure and report the results. For backup, you can clone your old setup following these steps: https://devtalk.nvidia.com/default/topic/898999/jetson-tx1/tx1-r23-1-new-flash-structure-how-to-clone-/post/4784149/#4784149

If you want to back up your JTX1 before flashing, clone the root partition (this can be mounted on loopback and contain your entire exact root partition):
https://devtalk.nvidia.com/default/topic/898999/jetson-tx1/tx1-r23-1-new-flash-structure-how-to-clone-/post/4784149/#4784149

This takes significant time, but means you can later go back and retrieve anything you want from the original (or just use it as comparison).

For anyone running into issues cold booting in L4T 23.2 while the module is still warm, see this thread: https://devtalk.nvidia.com/default/topic/920974

Thanks dusty. I missed the HTML documentation. Let me check it out.

I didnt upgrade the entire board to L4T_R23.2. I just built the kernel, modules, dtbs and just replaced them with the ones already present on the board. All the other libraries are from L4T_R23.1. The board still works fine for now. The boot arguments that were present in the new release were the same as before. So I didnt bother updating u-boot.

Two questions… How do you upgrade the JetPack…? I have JetPack 2.0 installed and want to upgrade to JetPack 2.1… Remove 2.0 then install 2.1, or just install 2.1 on top of 2.0, or is there another way…

Next, how do you update the Jetson TX1 to L4T R23.1 to R23.2… Complete reflash…?
Thanks,
-Michael

Jetpack is self-contained within the directory you ran Jetpack from on your host x86_64 machine. So all you have to do is save/run Jetpack 2.1 from a different directory than you saved/ran Jetpack 2.0 from (or rename/delete Jetpack 2.0 directory).

Jetpack 2.1 will reflash your TX1 with L4T R23.2.

Hi Dusty

Since I am still using R23.1, could you list where I can download those patch for V4L2 of R23.1, the file “r23.1_v4l2.tgz”, thank you so much.

Kevin

Hi Kevin, here’s a link to the r23.1_v4l2 archive referenced in the docs: https://www.dropbox.com/s/92x68rj48seqp2w/r23.1_v4l2.tgz?dl=0

Hi Dusty_nv,

Cool, Thank you for your promptly response, so when I check the release document on R23.2, it seems NVidia updated a lot drives related to V4L2 interface, include the hdmi to csi- 2 bridge chip Tc358840xbg, so my question is that if NVidia validate the hardware design already, if so, is that possible to access those design information, or it just use for internal testing? Thank you.

I believe many of these drivers were pulled in from upstream Linux or from the Android branch, possibly without hardware. At this time the only camera board released is the OV5693, available here: http://developer.nvidia.com/embedded/dlc/jetson-tx1-developer-kit-camera-module-schematic-and-layout-files

Hi,
I get the following error when trying to install L4T R23.2:
[b]Installing CUDA Toolkit for Ubuntu 14.04 7.0.73 failed.

Return Code: 1
Error installing cuda to host, please check /home/mkanyix/Documents/_installer/logs/TX1/cuda_host_tx1.log for more details[/b]

I looked at the cuda_host_tx1.log and it shows the following errors:
Err http://extras.ubuntu.com trusty/main armhf Packages
404 Not Found
Err http://security.ubuntu.com trusty-security/main armhf Packages
404 Not Foun

it seems the armhf Ubuntu packages are missing.

Any help will be appreciated.

thanks

My host is Fedora, so I can’t verify anything with JetPack, but it sounds like the setup is installing to your desktop host, but trying to install the armhf which belongs on the Jetson. Was there further information in the logs which could identify where the CUDA was attempting to be installed to…host versus Jetson? If for some reason JetPack was looking for armhf on x86_64 servers, this would account for not finding the package.

@linuxdev.Correct, the problem is that the setup is trying to download the armhf packages on my ubuntu desktop host first and that is why it fails.
I captured the installer command that runs on the desktop host.

/home/mkanyix/Documents//_installer/run_command -c="dpkg -i /home/mkanyix/Documents/jetpack_download/cuda-repo-ubuntu1404-7-0-local_7.0-73_amd64.deb;dpkg --add-architecture armhf; apt-get update; apt-get -y --force-yes install g+±arm-linux-gnueabihf gcc-arm-linux-gnueabihf cuda-toolkit-7-0 cuda-cross-armhf-7-0 libgomp1 libgomp1-armhf-cross libc6-armhf-cross libsfstdc++6-armhf-cross ;

Hello,

I’ve tried three times to do the upgrade without success. I’ve a 14.04 host who already did the upgrade with 2.0 without problem.

The installation script hang after copying my SSH key :

[ 129.3366 ] tegradevflash --write BCT P2180_A00_LP4_DSC_204Mhz.bct
[ 129.3393 ] Cboot version 00.01.0000
[ 129.5381 ] Writing partition BCT with P2180_A00_LP4_DSC_204Mhz.bct
[ 129.5391 ] [................................................] 100%
[ 129.6463 ] 
[ 129.6463 ] Flashing completed

[ 129.6464 ] Coldbooting the device
[ 129.6491 ] tegradevflash --reboot coldboot
[ 129.6523 ] Cboot version 00.01.0000
[ 129.8511 ] 
*** The target t210ref has been flashed successfully. ***
Reset the board to boot from internal eMMC.

1
Finished Flashing OS
Determining the IP address of target...
192.169.1.10 

Waiting 30 seconds to make sure target is fully up
# Host 192.169.1.10 found: line 9 type RSA
# Host 192.169.1.10 found: line 10 type ECDSA
/home/ben/.ssh/known_hosts updated.
Original contents retained as /home/ben/.ssh/known_hosts.old
# 192.169.1.10 SSH-2.0-OpenSSH_6.6.1p1 Ubuntu-2ubuntu2
# 192.169.1.10 SSH-2.0-OpenSSH_6.6.1p1 Ubuntu-2ubuntu2
/home/ben
Identity added: /home/ben/.ssh/id_rsa (/home/ben/.ssh/id_rsa)
scp -o PubkeyAuthentication=no -o ConnectTimeout=30 -o StrictHostKeyChecking=no /home/ben/.ssh/id_rsa.pub ubuntu@192.169.1.10:/home/ubuntu/tmp.pub
 .1.1
id_rsa.pub                                    100%  393     0.4KB/s   00:00    
ubuntu@tegra-ubuntu:~$ b /home/ubuntu/.ssh/authorized_keys 
ubuntu@tegra-ubuntu:~$ exit
logout
Connection to 192.169.1.10 closed.

The TX1 boot and I can login but there is many problems :

  • No sudo (error : sudo bit id not set for user ubuntu)
  • No Wifi
  • User management app don’t open
  • And so on…
    So I beleive it has not finish install.
    When I try to continue without flashing it stop after copying two files.
    What can I do ?
    Thanks for your help.

Hi Trancept,

I had the same issue because I was flashing from a non root permitive partition from my host.
Try to copy all in your home location and flash again and let me know.

Regards,
Ale

Thank you Ale,
You’re right.
I was running short on disk space so I’ve run the installation on an external NTFS drive. As the rootfs is build locally it can’t work.
Now my TX1 is working fine.