Makefile bug Dangerous makefile

In the Makefile of the SDK example of integration of C++ and CUDA;


# C/C++ source files (compiled with gcc / c++)

CCFILES         := \

        main.cpp \

        cppIntegration_gold.cpp \


The problem is that if you do this, and add C-files here (i.e. not C++), a “make clean” will efficiently remove all your source code … :fear:

This is because the in the;


OBJS +=  $(patsubst %.cpp,$(OBJDIR)/%.cpp_o,$(notdir $(CCFILES)))

OBJS +=  $(patsubst %.c,$(OBJDIR)/%.c_o,$(notdir $(CFILES)))


clean :


        $(VERBOSE)rm -f $(OBJS)


I think it would be nice if you could change the comments in Makefile(s) stating that C-files must be added to the CFILES variable, or even better, making the more safe constructing the OBJS variable.

Yes, I have backups. :)

– Kuisma

Ah, thanks a lot. I have been bitten by this before and thought I made another mistake…