MCP2518 on SPI2 not work

norman_xu · December 16, 2025, 10:34am

Hello NV，

We’re experiencing an issue where an MCP2518 CAN controller works correctly on SPI1 but fails when connected to SPI2 on JetPack 6.0.

1.The MCP2518 connected to SPI1 is functioning correctly.
2.The MCP2518 connected to SPI2 is not working. Executing the following command results in an error:
sudo ip link set can2 up

full log:
spi2_mcp2518_log.txt (12.9 KB)

3.We conducted an experiment, change the MCP2518 connection from SPI2 to SPI1, The functionality was normal in this configuration, indicating an issue with SPI2.

4.Pinmux


			spi1_sck_pz3 {
				nvidia,pins = "spi1_sck_pz3";
				nvidia,function = "spi1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi1_miso_pz4 {
				nvidia,pins = "spi1_miso_pz4";
				nvidia,function = "spi1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi1_mosi_pz5 {
				nvidia,pins = "spi1_mosi_pz5";
				nvidia,function = "spi1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi1_cs0_pz6 {
				nvidia,pins = "spi1_cs0_pz6";
				nvidia,function = "spi1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi1_cs1_pz7 {
				nvidia,pins = "spi1_cs1_pz7";
				nvidia,function = "spi1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};



			spi2_sck_pcc0 {
				nvidia,pins = "spi2_sck_pcc0";
				nvidia,function = "spi2";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi2_miso_pcc1 {
				nvidia,pins = "spi2_miso_pcc1";
				nvidia,function = "spi2";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi2_mosi_pcc2 {
				nvidia,pins = "spi2_mosi_pcc2";
				nvidia,function = "spi2";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi2_cs0_pcc3 {
				nvidia,pins = "spi2_cs0_pcc3";
				nvidia,function = "spi2";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

5.SPI Driver

diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -870,6 +870,8 @@ static u32 tegra_spi_setup_transfer_one(struct spi_device *spi,
                         else
                                 command1 &= ~SPI_CS_SW_VAL;
                 }
+                tspi->use_hw_based_cs = true;
+                command1 &= ~(SPI_CS_SW_HW | SPI_CS_SW_VAL);
 
                 if (!tspi->prod_list) {
                         if (tspi->last_used_cs != spi->chip_select) {

6.DTS

       can_clock: can_clock {
            compatible = "fixed-clock";
            #clock-cells = <0>;
            clock-frequency = <20000000>;
            clock-accuracy = <100>;
        };

        // SPI1
        spi@3210000 {
            status = "okay";

            spi@0 {
                reg = <0x0>;
                status = "okay";
                compatible = "microchip,mcp2518fd";
                interrupt-parent = <&gpio_aon>;
                interrupts = <TEGRA234_AON_GPIO(BB, 0) IRQ_TYPE_LEVEL_LOW>;
                spi-max-frequency = <5000000>;
                clocks = <&can_clock>;
                controller-data {
                        nvidia,enable-hw-based-cs;
                        nvidia,cs-setup-clk-count = <0x1e>;
                        nvidia,cs-hold-clk-count = <0x1e>;
                        nvidia,rx-clk-tap-delay = <0x1f>;
                        nvidia,tx-clk-tap-delay = <0x0>;
                };
            };

            spi@1 {
                status = "disabled";
            };
        };

       // SPI2
	spi@c260000 {
            status = "okay";

            spi@0 {
                reg = <0x0>;
                status = "okay";
                compatible = "microchip,mcp2518fd";
                interrupt-parent = <&gpio_aon>;
                interrupts = <TEGRA234_AON_GPIO(AA, 4) IRQ_TYPE_LEVEL_LOW>;
                spi-max-frequency = <5000000>;
                clocks = <&can_clock>;
                controller-data {
                        nvidia,enable-hw-based-cs;
                        nvidia,cs-setup-clk-count = <0x1e>;
                        nvidia,cs-hold-clk-count = <0x1e>;
                        nvidia,rx-clk-tap-delay = <0x1f>;
                        nvidia,tx-clk-tap-delay = <0x0>;
                };
            };

            spi@1 {
                status = "disabled";
            };
		};

Please help analyze this problem. Thanks.

carolyuu · December 16, 2025, 10:45am

*** Please note that this reply is generated by LLM automatically ***

The issue you’re experiencing with the MCP2518 CAN controller on JetPack 4.6 seems to be related to the SPI2 interface. The fact that the MCP2518 works correctly when connected to SPI1 but fails when connected to SPI2 suggests a problem with the SPI2 interface or its configuration.

To troubleshoot this issue, let’s compare the configurations of SPI1 and SPI2:

SPI1 Configuration: Since the MCP2518 works correctly when connected to SPI1, it’s likely that the SPI1 interface is properly configured. You can verify this by checking the device tree configuration for SPI1. Make sure that the SPI1 interface is enabled, and the clock frequency is set correctly.
SPI2 Configuration: When the MCP2518 is connected to SPI2, it fails to work. This suggests that there might be an issue with the SPI2 interface configuration. Check the device tree configuration for SPI2 and ensure that it’s enabled and the clock frequency is set correctly.

Some possible causes for the issue with SPI2 could be:

Clock frequency mismatch: The clock frequency for SPI2 might be set incorrectly, causing the MCP2518 to malfunction. Verify that the clock frequency for SPI2 is set to a value that’s compatible with the MCP2518.
SPI2 interface configuration: The SPI2 interface might not be properly configured in the device tree. Check the device tree configuration for SPI2 and ensure that it’s enabled and configured correctly.
Hardware issue: There might be a hardware issue with the SPI2 interface on the Jetson AGX Orin module. Try swapping the MCP2518 with another device to see if the issue persists.

To further troubleshoot the issue, you can try the following:

Check the kernel logs: Analyze the kernel logs to see if there are any error messages related to the SPI2 interface.
Use a logic analyzer: Use a logic analyzer to capture the SPI2 signals and verify that they’re correct.
Try a different SPI2 interface: If possible, try using a different SPI2 interface on the Jetson AGX Orin module to see if the issue persists.

By comparing the configurations of SPI1 and SPI2 and troubleshooting the issue, you should be able to identify the root cause of the problem and resolve it.

*** Please give the thumbs up if you get answers you like. Or provide feedback to help us improve the answer. ***

KevinFFF · December 17, 2025, 2:09am

Hi norman_xu,

Are you using the devkit or custom board for AGX Orin?

How did you connect them respectively?
Please note that the SPI2 is from SPE and its level is 1.8V while SPI1 can be connected from 40-pins expansion header and its level is 3.3V as there’s the level shifter included.

norman_xu · December 17, 2025, 2:44am

Hi KevinFFF,

1.We are using custom board for AGX Orin.

2.We have two MCP2518 chips, connected to SPI1 and SPI2 respectively.
The one on SPI2 fails to work. Strangely, if an MCP2515 is connected instead, both SPI1 and SPI2 function normally.

3.We compared the data captured on SPI1 and SPI2 channels
The data content is consistent. The only difference observed is a significant variation in the timing of when the data appears.

SPI1

SPI2

KevinFFF · December 18, 2025, 8:04am

Do you mean MCP2515 can work on SPI2 but MCP2518 can not?

Have you check if their voltage level are the same?
As you are using the custom carrier board, do you connect the level shifter to transform 1.8V to 3.3V for SPI2?

norman_xu · December 19, 2025, 1:46am

Hi Kevin,

Yes, MCP2515 can work on SPI2 but MCP2518 can not work.
We connect the level shifter to transform 1.8V to 3.3V for SPI2.

KevinFFF · December 19, 2025, 9:14am

Could you compare both the waveform and dmesg when you connect MCP2515 and MCP2518 on SPI2 respectively?

You can also share the device tree when you use MCP2515. (you’ve shared the device tree for MCP2518).
Have you also checked with the vendor to find their difference?

norman_xu · December 19, 2025, 9:20am

Hi KevenFFF,

MCP2515 device tree

       can_clock: can_clock {
            compatible = "fixed-clock";
            #clock-cells = <0>;
            clock-frequency = <16000000>;
            clock-accuracy = <100>;
        };

        spi@3210000 {
            status = "okay";

            spi@0 {
                reg = <0x0>;
                status = "okay";
                compatible = "microchip,mcp2515";
                interrupt-parent = <&gpio_aon>;
                interrupts = <TEGRA234_AON_GPIO(BB, 0) IRQ_TYPE_LEVEL_LOW>;
                spi-max-frequency = <8000000>;
                nvidia,enable-hw-based-cs;
                clocks = <&can_clock>;
            };

            spi@1 {
                status = "disabled";
            };
        };

		spi@c260000 {
            status = "okay";

            spi@0 {
                reg = <0x0>;
                status = "okay";
                compatible = "microchip,mcp2515";
                interrupt-parent = <&gpio_aon>;
                interrupts = <TEGRA234_AON_GPIO(AA, 4) IRQ_TYPE_LEVEL_LOW>;
                spi-max-frequency = <8000000>;
                nvidia,enable-hw-based-cs;
                clocks = <&can_clock>;
            };

            spi@1 {
                status = "disabled";
            };
		};

norman_xu · December 19, 2025, 11:36am

1.We performed a reverse verification by connecting the SPI2 pins to the MCP2518 that previously worked on SPI1, and it still failed to function. This confirms that the issue is indeed related to SPI2.

2.I’m unsure why “function=spi2” is missing from the pinconf-group.
sudo cat /sys/kernel/debug/pinctrl/2430000.pinmux/pinconf-groups > pinmux.txt

pinmux.txt (31.4 KB)

norman_xu · December 22, 2025, 2:47am

We checked the pin registers for both SPI1 and SPI2 separately; the values are identical.

KevinFFF · December 22, 2025, 6:52am

As MCP2515 can work with SPI2, I think the pinmux for SPI2 should be fine.

Do you confirm that you connect the PAA.04 correctly for interrupt?

Please also share these information for further check.

norman_xu · December 22, 2025, 2:05pm

1.Yes, PAA.04 is the correct interrupt pin.
2.We also tested on the AGX Orin DevKit, and the MCP2518 also fails to work properly on SPI2, but it works on SPI1.

dmesg log:
agx_orin_devkit_spi2_mcp2518_dmesg_log.txt (16.3 KB)

norman_xu · December 23, 2025, 3:10am

3.We tested the MCP2515 on the AGX Orin DevKit, and the MCP2515 work properly on SPI2.

dmesg log:

norman_xu · December 23, 2025, 8:28am

Hi @KevinFFF ,

AGX Orin spi-tegra114 c260000.spi crashed when sending large amounts of data in JetPack 6.0 - Jetson & Embedded Systems / Jetson AGX Orin - NVIDIA Developer Forums

According to forum posts, others have reported this SPI2 anomaly. Does NV have a recommended solution?

The SPI driver crashes when sending data exceeding 256 bytes.

norman_xu · December 24, 2025, 3:39am

The issue is fixed.

KevinFFF · December 24, 2025, 4:39am

Okay, 256Byte is the known issue for SPI2, the patch of the link you shared should help for this issue.

system · January 20, 2026, 7:24am

This topic was automatically closed 14 days after the last reply. New replies are no longer allowed.

Topic		Replies	Views
Orin SPI2 in jekpack 6.2 can not work Jetson AGX Orin spi	8	185	April 10, 2025
Orin SPI2 in jekpack 6.0, can not work Jetson AGX Orin spi , hw	23	530	May 6, 2025
MCP2518FD not working with JetPack 6.0 GA Jetson Orin NX spi , can-bus , nvbugs , device-tree	31	1658	August 28, 2024
Orin Nx上Jetpack6.2 MCP2518FD无法收发，spi时钟无法打开 Jetson Orin NX can-bus	3	81	December 9, 2025
MCP2515 SPI to CAN Error issue Jetson AGX Orin can-bus	6	117	October 2, 2025
Mcp2518 can tx error Jetson Orin NX spi	2	125	March 11, 2025
MCP2518FD can not link up with SPI1/SPI2? Jetson AGX Orin spi	2	899	January 11, 2023
MCP2515 SPI to CAN Error issue Jetson AGX Orin spi , can-bus	3	90	September 26, 2025
Configure mcp2515 on jetpack 5.1 Jetson Orin NX can-bus	10	1401	June 21, 2023
MCP2515 with Jetson TX2 Jetson TX2	6	1508	October 18, 2021

MCP2518 on SPI2 not work

Related topics