Ok, the last dtb:
sdhci@700b0400 {
compatible = "nvidia,tegra210-sdhci";
reg = <0x0 0x700b0400 0x0 0x200>;
interrupts = <0x0 0x13 0x4>;
aux-device-name = "sdhci-tegra.2";
iommus = <0x30 0x1b>;
nvidia,runtime-pm-type = <0x0>;
clocks = <0x26 0x45 0x26 0xf3 0x26 0x136 0x26 0xc1>;
clock-names = "sdmmc", "pll_p", "pll_c4_out2", "sdmmc_legacy_tm";
resets = <0x26 0x45>;
reset-names = "sdhci";
status = "okay";
tap-delay = <0x3>;
trim-delay = <0x3>;
mmc-ocr-mask = <0x3>;
max-clk-limit = <0xc28cb00>;
ddr-clk-limit = <0x2dc6c00>;
bus-width = <0x4>;
calib-3v3-offsets = <0x7d>;
calib-1v8-offsets = <0x7b7b>;
compad-vref-3v3 = <0x7>;
compad-vref-1v8 = <0x7>;
pll_source = "pll_p", "pll_c4_out2";
ignore-pm-notify;
cap-mmc-highspeed;
cap-sd-highspeed;
nvidia,en-io-trim-volt;
nvidia,en-periodic-calib;
cd-inverted;
wp-inverted;
pwrdet-support;
nvidia,min-tap-delay = <0x6a>;
nvidia,max-tap-delay = <0xb9>;
pinctrl-names = "sdmmc_schmitt_enable", "sdmmc_schmitt_disable", "sdmmc_clk_schmitt_enable", "sdmmc_clk_schmitt_disable", "sdmmc_drv_code", "sdmmc_default_drv_code", "sdmmc_e_33v_enable", "sdmmc_e_33v_disable";
pinctrl-0 = <0x8d>;
pinctrl-1 = <0x8e>;
pinctrl-2 = <0x8f>;
pinctrl-3 = <0x90>;
pinctrl-4 = <0x91>;
pinctrl-5 = <0x92>;
pinctrl-6 = <0x93>;
pinctrl-7 = <0x94>;
vqmmc-supply = <0x3b>;
vmmc-supply = <0x95>;
cd-gpios = <0x5b 0xa8 0x0>;
nvidia,vmmc-always-on;
uhs-mask = <0x0>;
sd-uhs-sdr104;
sd-uhs-sdr50;
sd-uhs-sdr25;
sd-uhs-sdr12;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
no-sdio;
no-mmc;
linux,phandle = <0xbd>;
phandle = <0xbd>;
prod-settings {
#prod-cells = <0x3>;
prod_c_ds {
prod = <0x100 0xff0000 0x10000 0x1e0 0xf 0x7 0x1e4 0x30077f7f 0x3000007d>;
};
prod_c_hs {
prod = <0x100 0xff0000 0x10000 0x1e0 0xf 0x7 0x1e4 0x30077f7f 0x3000007d>;
};
prod_c_sdr12 {
prod = <0x100 0xff0000 0x10000 0x1e0 0xf 0x7 0x1e4 0x30077f7f 0x30007b7b>;
};
prod_c_sdr25 {
prod = <0x100 0xff0000 0x10000 0x1e0 0xf 0x7 0x1e4 0x30077f7f 0x30007b7b>;
};
prod_c_sdr50 {
prod = <0x100 0xff0000 0x10000 0x1c0 0xe000 0x8000 0x1e0 0xf 0x7 0x1e4 0x30077f7f 0x30007b7b>;
};
prod_c_sdr104 {
prod = <0x100 0xff0000 0x10000 0x1c0 0xe000 0x4000 0x1e0 0xf 0x7 0x1e4 0x30077f7f 0x30007b7b>;
};
prod_c_ddr52 {
prod = <0x100 0x1fff0000 0x0 0x1e0 0xf 0x7 0x1e4 0x30077f7f 0x30007b7b>;
};
prod {
prod = <0x100 0x1fff000e 0x3090028 0x1c0 0x8001fc0 0x8000040 0x1c4 0x77 0x0 0x120 0x20001 0x1 0x128 0x43000000 0x0 0x1f0 0x80000 0x80000>;
};
};
};
tegra210-p.dts (327.1 KB)