MIPI CSI-2 on Jetson AGX Xavier shows RESERVED_18, RESERVED_19 errors

Hello,

I’m trying to capture images via MIPI CSI-2 on Jetson AGX Xavier devkit.
The MIPI CSI-2 interface of my Jetson AGX Xavier is connected to Xilinx FPGA.

System Configuration

My system connection is like this:

    (MIPI CSI Tx from Xilinx FPGA) => ["CSI C" port at Jetson AGX Xavier devkit] = "x4" lanes => [ "Port 2" at NVCSI ] = "x4" => ["Stream 2" at VI]

    note: I use L4T 32.4.4 on Jetson AGX Xavier.

Note that FPGA itself(corresponding to MIPI “camera”) has a controller CPU,
so I think there is no need to control the FPGA with I2C from Jetson AGX Xavier.
furtheremore, I need to use “CSI C” port with 4 lanes according to my interposer board’s pin assignment spec.

The image format I’m trying is 1920x1080, RAW(RGGB) 8bit.

My Problem

To realize the above system,
I made a device driver based on the imx185’s example driver
according to “Sensor Software Driver Programming” on NVIDIA Jetson Linux Developer Guide.

The major difference between the example driver and my driver is I2C access behavier.
I modified I2C access functions in the example driver(e.g. “imx185_read_reg”) so that
these functions always return success(0) without actual I2C access, as if these I2C accesses succeeded.

Eventually, I flashed device-tree, loaded my driver module,
then I tried to capture images with v4l2-ctl, like this:

v4l2-ctl --verbose --set-fmt-video=width=1920,height=1080,pixelformat=RGGB --stream-count=1 --stream-mmap --set-ctrl bypass_mode=0

but, I couldn’t capture frame at all.
It seems that v4l2-ctl fails to capture a frame and tries to capture repeatedly.

I checked dmesg’s log and trace log, according to Jetson Camera Bring Up(Jetson/l4t/Camera BringUp - eLinux.org).
It seems that there is no critical errors,
but I could find some mysterious “RESERVED_18”, “RESERVED_19” messages only.

I attach dmesg’s log and trace log to this post, and
I paste my system’s device-tree summary to this post.

There should be something wrong, but I can’t find it.
Could someone give me any hints?

Thanks

NOTE

There was CSIMUX_FRAME errors(CRC error on payload, FE_flag, FE_CSI_FAULT), and CSIMUX_STREAM error(SPURIOUS_DATA_STREAM_2)
when the following device-tree’s properties are set to like this:

  • cil_settletime = "0"
  • discontinuous_clk = "no"

But after I updated them to like this:

  • cil_settletime = "19"
  • discontinuous_clk = "yes"

then, the CSIMUX_FRAME errors and CSIMUX_STREAM error disappeared.

Device Tree Summary

My device-tree summary is like this:

Summary
/ {
    host1x {
        vi@15c10000 {
            num-channels = <1>;
            ports {
                #address-cells = <1>;
                #size-cells = <0>;
                port@0 {
                    status = "okay";
                    reg = <0>;
                    liimx185_vi_in0: endpoint {
                        status = "okay";
                        port-index = <2>;
                        bus-width = <4>;
                        remote-endpoint = <&liimx185_csi_out0>;
                    };
                };
            };
        };
        nvcsi@15a00000 {
            num-channels = <1>;
            #address-cells = <1>;
            #size-cells = <0>;
            channel@0 {
                status = "okay";
                reg = <0>;
                ports {
                    #address-cells = <1>;
                    #size-cells = <0>;
                    port@0 {
                        status = "okay";
                        reg = <0>;
                        liimx185_csi_in0: endpoint@0 {
                            status = "okay";
                            port-index = <2>;
                            bus-width = <4>;
                            remote-endpoint = <&liimx185_imx185_out0>;
                        };
                    };
                    port@1 {
                        status = "okay";
                        reg = <1>;
                        liimx185_csi_out0: endpoint@1 {
                            status = "okay";
                            remote-endpoint = <&liimx185_vi_in0>;
                        };
                    };
                };
            };
        };
    };
    i2c@3180000 {
            imx185_a@1a {
                status = "okay";
                compatible = "nvidia,imx185";
                reg = <0x1a>;
                devnode = "video0";
                physical_w = "15.0";
                physical_h = "12.5";
                sensor_model ="imx185";
                post_crop_frame_drop = "0";
                use_decibel_gain = "true";
                delayed_gain = "true";
                use_sensor_mode_id = "true";
                limit_analog_gain = "true";

                mclk = "extperiph1";
                clock-names = "extperiph1", "pllp_grtba";
                clocks = <&bpmp_clks TEGRA194_CLK_EXTPERIPH1>, <&bpmp_clks TEGRA194_CLK_PLLP_OUT0>;

                mode0 {
                    mclk_khz = "37125";
                    num_lanes = "4";
                    tegra_sinterface = "serial_c";
                    phy_mode = "DPHY";
                    discontinuous_clk = "yes";
                    dpcm_enable = "false";
                    cil_settletime = "19";
                    dynamic_pixel_bit_depth = "8";
                    csi_pixel_bit_depth = "8";
                    mode_type = "bayer";
                    pixel_phase = "rggb";

                    active_w = "1920";
                    active_h = "1080";
                    readout_orientation = "0";
                    line_length = "2200";
                    inherent_gain = "1";
                    mclk_multiplier = "2";
                    pix_clk_hz = "74250000";

                    gain_factor = "10";
                    min_gain_val = "0"; /* 0dB */
                    max_gain_val = "480"; /* 48dB */
                    step_gain_val = "3"; /* 0.3 */
                    default_gain = "0";
                    min_hdr_ratio = "1";
                    max_hdr_ratio = "1";
                    framerate_factor = "1000000";
                    min_framerate = "1500000"; /* 1.5 */
                    max_framerate = "30000000"; /* 30 */
                    step_framerate = "1";
                    default_framerate= "30000000";
                    exposure_factor = "1000000";
                    min_exp_time = "30"; /* us */
                    max_exp_time = "660000"; /* us */
                    step_exp_time = "1";
                    default_exp_time = "33334";/* us */
                    embedded_metadata_height = "1";
                };

                ports {
                    #address-cells = <1>;
                    #size-cells = <0>;
                    port@0 {
                        reg = <0>;
                        liimx185_imx185_out0: endpoint {
                            port-index = <2>;
                            bus-width = <4>;
                            remote-endpoint = <&liimx185_csi_in0>;
                            };
                        };
                    };
                };
    };
};
/ {
    tegra-camera-platform {
        compatible = "nvidia, tegra-camera-platform";
        num_csi_lanes = <4>;
        max_lane_speed = <1500000>;
        min_bits_per_pixel = <8>;
        vi_peak_byte_per_pixel = <2>;
        vi_bw_margin_pct = <25>;
        isp_peak_byte_per_pixel = <5>;
        isp_bw_margin_pct = <25>;

        modules {
            module0 {
                status = "okay";
                badge = "imx185_bottom_liimx185";
                position = "bottom";
                orientation = "0";
                drivernode0 {
                    pcl_id = "v4l2_sensor";
                    devname = "imx185 30-001a";
                    proc-device-tree = "/proc/device-tree/i2c@3180000/imx185_a@1a";
                };
            };
        };
    };
};

dmesg_log.txt (37.7 KB)
trace_log.txt (101.1 KB)

Looks like NVCSI/VI didn’t receive any validate frame data from MIPI bus.
Please probe the MIPI signal to confirm it.

hello, ShaneCCC

Sorry for late reply.

I checked MIPI signal with oscilloscope.
It seems that there is no problem in the aspect of D-PHY specification.

Now, I’m trying to confirm MIPI signal in the aspect of CSI-2 protocol.

Thanks