Hi All:
We use the deserializer 1.5G frequency to test the mipi eye diagramed by the mismatch of the terminal resistance inside Orin? Is there any way to adjust it?
note：
The deserializer 2.5G frequency is normal.
Do you mean failed with 1.5G but normal with 2.5G? That looks like DeSer issue, not SI issue.
A high-speed receiver is a differential line receiver. It contains a switchable parallel input termination ZID between the positive input pin Dp and the negative input pin Dn.
The differential input high threshold voltage and low threshold voltage of a high-speed (HS) receiver are denoted by VIDTH and VIDTL, respectively. VILHS and VIHHS are the single-ended input low voltage and input high voltage, respectively. VCMRX (DC) is the differential input common-mode voltage. A high-speed receiver shall be able to detect a differential signal at its Dp and Dn input signal pins when both signal voltages VDP and VDN are within the common-mode voltage range and the voltage difference between VDP and VDN exceeds VIDTH or VIDTL. A high-speed receiver shall be able to correctly receive high-speed data while rejecting high-frequency common-mode interference ΔVCMRX (HF) and low-frequency common-mode interference ΔVCMRX (LF).
高速接收器是一种差分线路接收器。它在正输入引脚 Dp 和负输入引脚 Dn 之间包含一个可切换的并联输入终端 ZID。
高速（HS）接收器的差分输入高阈值电压和低阈值电压分别用 VIDTH 和 VIDTL 表示。VILHS 和 VIHHS 分别是单端输入低电压和输入高电压。VCMRX (DC) 是差分输入共模电压。当两个信号电压 VDP 和 VDN 都在共模电压范围内，且 VDP 与 VDN 的电压差超过 VIDTH 或 VIDTL 时，高速接收器应能在其 Dp 和 Dn 输入信号引脚处检测到差分信号。高速接收器应能正确接收高速数据，同时抑制高频共模干扰 ΔVCMRX (HF) 和低频共模干扰 ΔVCMRX (LF)。
第 8 节规定了接收器（RX）的共模回波损耗和差模回波损耗。CCM 是共模交流终端，它能确保接收器在较高频率下实现适当的终端匹配。对于更高的数据速率，需要在终端中心抽头处设置 CCM，以满足共模反射要求。
CSI Tuning is not supported. Custom board design only needs to follow the Design Guide to do routing. You can find other topics in which some users run 2.5G without issue.
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