Not allowed to limit reverse current on carrier board?

The series design guide V1.1 for Orin Nano and Orin NX has a very curious note at the bottom of page 18 (or 29 when going by the PDF page number):

“Designs which implement an eFUSE or current limiting device on the input power rail of the
module should select a part that DOES NOT limit reverse current.”

What is the meaning behind this? If reverse current protection is necessary for a system, which failure modes would be introduced by ignoring this note?

Hi, the reason why we have specified the cautions as your mentioned is sudden current fluctuations occur frequently on the Jetson module in some of the use cases. This is due to the possibility that drastic load changes may be detected as a reverse voltage by a protection circuit.

When the heavy system load on the CPU, GPU, and other function blocks in SoC(frequent memory accesses either continuous calculation, that is caused by applications), the current consumption increases significantly in a short period of time, and when the processing is finished, the current consumption decreases rapidly. The ability to handle such dynamic load variations is the reason why reverse current should not be limited. Also, the power supply circuit must be able to chase such fluctuations.

Ok, thank you for answering my question. It sounds like the system behaves like every other and the note is just overly cautious.

This is probably the wrong place to ask, but maybe it would be prudent to add half a sentence to the design guide indicating what you just told me?

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