Nvcsi, vi -- 12 lanes support & YUV422 support doubts

Autonomous Machines Jetson & Embedded Systems Jetson TX2
#1

Hello All,

In FPGA (acts as CSI2 Tx) sends the 12G data via 12 lanes (Due to limitation, need to use all 12 lanes) in nvcsi.

In nvcsi & vi combinations, after it receives the how to merge these data? since vi puts these pixels in memory using the formats in TRM.

The data type: YUV422-8bit and YUV 2ppc or YUV 4ppc.

Can we use this data type for this scenarios.

-Thanks.

#2

hello BalajiNP,

there is duplicate topic, let’s keep tracking this in Topic 1042634.
thanks