Hi,
We build custom board and DDR3 works only row frequency.
We are trying to figure it out. (Any suggestions welcome)
At the same time, we try to flash firmware but it failed like below.
It said “Error while getting the SDRam size”.
What does it means ?
Any suggestions?
Thanks.
runreg
nvhost.exe --avp --sdram PM375_TK1_Micron_4GB_MT41K512M16HA107_204MHz.cfg --skip-reset --chip t124 wfblit_lite.axf -- -fc 1,50,0 -fh 150 -vic 300 -reg 1
nvhost: ========================================
nvhost: Found --chip parameter
nvhost: ...success! Found t124
nvhost: ========================================
nvblserver: Loading "wfblit_lite.axg" via usb:...
Done.
WARNING: Ignoring auto-detect due to --chip parameter
...Now connected to target using usb
target_stdout: enter NvTestMain V01
target_stdout: Processing argument 1: -fc
target_stdout: Processing argument 3: -fh
target_stdout: Processing argument 5: -vic
target_stdout: -vic 300
target_stdout: Processing argument 7: -reg
target_stdout: The number of pattern: 16, box num 30
target_stdout: box width/height 2048 128 Surface width/height: 2048 3840
target_stdout: init sdram
target_stdout: Memory size = 0x00000400
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM test PASSED
target_stdout: Register Engine
target_stdout: Find Engine id: 0x5d
target_stdout: search id: 0x5e
target_stdout: search id: 0x5d
target_stdout: Engine ID: 0x5d found
target_stdout:
target_stdout:
target_stdout: -------Start: sanity in Register based mode
target_stdout: Board: E1186
target_stdout: top 0xfffffffe
target_stdout: initBLit
target_stdout: Init Vic Frequency Ctrl
target_stdout: Setting PLLC (600MHz). VIC (300MHz), AVP (150MHz), Host1x (150MHz)
target_stdout: SOURCE_VIC reg: 0x20000002 VIC source: PLLC_OUT0
target_stdout: ENB X reg: 0x01040000 vic clock: enable
target_stdout: SOURCE_HOST1X reg: 0x40000006 HOST1X source: PLLC_OUT0
target_stdout: ENB L reg: 0x90409130 host1x clock: enable
target_stdout: AllocSyncpt
target_stdout: channe base:0x50000000 sync base:0x2100, syncpt0 base:0xf80
target_stdout: prep surface
target_stdout: DRAM addr range: 0x80000000 - 0xfffffffe
target_stdout: DRAM footprint: 0x80000000 - 0x81e00000 (wfblit)
target_stdout: DRAM used: 30.0MB (blit uses 30.0MB)
target_stdout: Blit Start Addr: 0x80000000, Medium loops: 0x1
target_stdout: == Range 0 in 1: 0x80000000 - 0x81dfffff
target_stdout: wfblitcore
target_stdout: Patterns loaded. starting blits.
target_stdout: PMC aperture space
target_stdout: PMC_PLLP_WB0_OVERRIDE reg: 0x00000422
target_stdout: PLLM_WB0_OVERRIDE_FREQ reg: 0x0000010c
target_stdout: PMC:PLLP: override: disable
target_stdout: PMC:PLLM: override: disable (12,1)
target_stdout:
target_stdout: CAR aperture space
target_stdout: PLLM: 408MHz(1,34,0), PLL_BASE: 0x4c002201,
target_stdout: PLLP: override: disable
target_stdout: PLLP: 408MHz(12,1,0), PLL_BASE: 0x4800010c,
target_stdout: PLLC: 600MHz(1,50,0), PLL_BASE: 0x48003201,
target_stdout: EMC source clk: PLLP_OUT0, SOURCE_EMC: 0x40000002
target_stdout: (ref=12MHz)
target_stdout: EMC freq: 204MHz
target_stdout: start box. loops: 0x10 numbox: 30
target_stdout: end box
target_stdout: Programming done. Waiting test done.
target_stdout: ----------------------
target_stdout: T124 Memory Statistics
target_stdout: ----------------------
target_stdout: Stats (
target_stdout:
target_stdout: Channel 0:
target_stdout: DEV 0:
target_stdout: .RD (
target_stdout: .RD8 (
target_stdout: .WR (
target_stdout: .WR8 (
target_stdout: .ACT (
target_stdout: .REF (
target_stdout: .SREF (
target_stdout: .E1CA (
target_stdout: .E1SA (
target_stdout: .E0CA (
target_stdout: .E0SA (
target_stdout: .E1CN (
target_stdout: .E1SN (
target_stdout: .E0CN (
target_stdout: .E0SN (
target_stdout:
target_stdout: DEV 1:
target_stdout: .RD (
target_stdout: .RD8 (
target_stdout: .WR (
target_stdout: .WR8 (
target_stdout: .ACT (
target_stdout: .REF (
target_stdout: .SREF (
target_stdout: .E1CA (
target_stdout: .E1SA (
target_stdout: .E0CA (
target_stdout: .E0SA (
target_stdout: .E1CN (
target_stdout: .E1SN (
target_stdout: .E0CN (
target_stdout: .E0SN (
target_stdout:
target_stdout: Channel 0 Bandwidth(avg): 1218MB/s, or 74% (assuming static 204MHz)
target_stdout: =====================
target_stdout: End Memory Statistics
target_stdout: =====================
target_stdout: Blit done. The blit took 9.0 seconds
target_stdout: Read back check. Mask = 0xffffffff
target_stdout: wfblitcore done!
target_stdout: ------- End: sanity in Register based mode
target_stdout: [pass: SubtestWfblit]
target_stdout: ---------------
target_stdout: total subtests: 1
target_stdout: total failures: 0
target_stdout:
target_exit(0)
nvhost: QUIT
runmats
nvhost.exe --avp --sdram PM375_TK1_Micron_4GB_MT41K512M16HA107_204MHz.cfg --skip-reset --chip t124 mats.axf
nvhost: ========================================
nvhost: Found --chip parameter
nvhost: ...success! Found t124
nvhost: ========================================
nvblserver: Loading "mats.axg" via usb:...
Done.
WARNING: Ignoring auto-detect due to --chip parameter
...Now connected to target using usb
target_stdout: Initializing SDRAM controller.
target_stdout: Init PLLM: M=1, N=34, P=0, Misc1=1879048192, Misc2=0,StableTime=3356171
target_stdout: Memory size = 0x00000400
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM test PASSED
target_stdout: SDRAM size: 2047 MB (0x7ff00000)
target_stdout: [pass: SubtestInitSdramController]
target_stdout: Memory size: 0x7ff00000
target_stdout: [pass: SubtestCheckPatLength]
target_stdout: Beginning AddressOnData Test.
target_stdout: Memory_AddressOnDataTest start
target_stdout: Writing test range 0 (0x80000040 - 0xbff80000)
target_stdout: Writing test range 1 (0xbff80000 - 0xfff00000)
target_stdout: Verifying range 0 (0x80000040 - 0xbff80000)
target_stdout: Verifying range 1 (0xbff80000 - 0xfff00000)
target_stdout: Memory_AddressOnDataTest end
target_stdout: [pass: SubtestAddressOnData]
target_stdout: ---------------
target_stdout: total subtests: 3
target_stdout: total failures: 0
target_stdout:
target_exit(0)
nvhost: QUIT
flashing
[0000.000] [TegraBoot] (version UNDEF_BUILD)
[0000.004] Reset reason: power on reset
[0000.008] Processing in recovery mode
[0000.011] Established communication link with host
[0000.000] [TegraBoot] (version UNDEF_BUILD)
[0000.004] Reset reason: power on reset
[0000.007] Processing in recovery mode
[0000.010] Established communication link with host
[0001.149] Downloaded bct successfully
[0001.153] No Battery Present
[0001.157] Sdram initialization is successful
[0001.170] Downloaded DTB successfully
[0001.175] No Battery Present
[0001.255] Downloaded bootloader successfully
[0001.259] CPU-bootloader entry address: 0x83d88000
[0001.263] BoardId: 375
[0001.265] Vpr Carveout Base=0x0f4600000 Size=0x00ba00000
[0001.271] Tsec Carveout Base=0x0f2600000 Size=0x002000000
[0001.276] Lp0 Carveout Base=0x0f25ff000 Size=0x000001000
[0001.281] Xusb Carveout Base=0x0f2300000 Size=0x000200000
[0001.286] Platform-DebugCarveout: 0
[0001.313] CPU power rail is up
[0001.316] Performing RAM repair
[0001.318] CPU clock init successful
[0001.322] Starting CPU & Halting co-processor
[b]Error while getting the SDRam size
Error while getting the SDRam size[/b]
NVRM Initialized shmoo database
NVRM CLOCKS: PLLX0: 696000 Khz
NVRM CLOCKS: PLLM0: 408000 Khz
NVRM CLOCKS: PLLC0: 0 Khz
NVRM CLOCKS: PLLP0: 408000 Khz
NVRM CLOCKS: PLLA0: 11289 Khz
NVRM CLOCKS: CPU: 696000 Khz
NVRM CLOCKS: AVP: 48000 Khz
NVRM CLOCKS: System Bus: 48000 Khz
NVRM CLOCKS: Memory Controller: 204000
NVRM CLOCKS: External Memory Controller: 204000
EEPROM instance-5: No slave at this instance.
EEPROM instance-0: No slave at this instance.
EEPROM instance-0: Querying board info from BCT.
EEPROM instance-0: No board info available for this instance in BCT.
EEPROM instance-1: No slave at this instance.
EEPROM instance-1: Querying board info from BCT.
EEPROM instance-1: Board info present in BCT is invalid.
EEPROM instance-2: No slave at this instance.
EEPROM instance-2: Querying board info from BCT.
EEPROM instance-2: No board info available for this instance in BCT.
EEPROM instance-3: No slave at this instance.
EEPROM instance-3: Querying board info from BCT.
EEPROM instance-3: No board info available for this instance in BCT.
EEPROM instance-4: No slave at this instance.
EEPROM instance-4: Querying board info from BCT.
EEPROM instance-4: Board info present in BCT is invalid.
EEPROM instance-5: No slave at this instance.
EEPROM instance-5: Querying board info from BCT.
EEPROM instance-5: BoardInfo: 0x0000:0x0000:0375:0000:05:EEPROM instance-6: Querying board info from BCT.
EEPROM instance-6: BoardInfo: 0xffff:0xffff:0375:0000:05:EEPROM instance-7: No slave at this instance.
EEPROM instance-7: Querying board info from BCT.
EEPROM instance-7: No board info available for this instance in BCT.
Final BoardID: proc: 375 and pmu 375
ADJUSTED CLOCKS:
MC clock is set to 204000 KHz
EMC clock is set to 204000 KHz (DDR clock is at 204000 KHz)
PLLX0 clock is set to 696000 KHz
PLLC0 clock is set to 0 KHz
CPU clock is set to 696000 KHz
System and AVP clock is set to 48000 KHz
GraphicsHost clock is set to 163200 KHz
MSENC clock is set to 40800 KHz
Vde clock is set to 204000 KHz
[b]Error while getting the SDRam size
Error while getting the SDRam size[/b]